summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorNAKAMURA Takumi <geek4civic@gmail.com>2016-08-22 00:58:04 +0000
committerNAKAMURA Takumi <geek4civic@gmail.com>2016-08-22 00:58:04 +0000
commit59a20649c6d80c493900ca7874faca3d5e0f61af (patch)
treefaac7c9ddc29e096dc23ba7b8b7e1dfdc6a268c9 /llvm/lib
parent9f8bc029bdbcfd9ee76756d2690a59ea746ebe72 (diff)
downloadbcm5719-llvm-59a20649c6d80c493900ca7874faca3d5e0f61af.tar.gz
bcm5719-llvm-59a20649c6d80c493900ca7874faca3d5e0f61af.zip
Untabify.
llvm-svn: 279408
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Object/MachOObjectFile.cpp29
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp10
-rw-r--r--llvm/lib/Target/PowerPC/PPCFastISel.cpp4
3 files changed, 20 insertions, 23 deletions
diff --git a/llvm/lib/Object/MachOObjectFile.cpp b/llvm/lib/Object/MachOObjectFile.cpp
index f34e68721c0..e7507d29d17 100644
--- a/llvm/lib/Object/MachOObjectFile.cpp
+++ b/llvm/lib/Object/MachOObjectFile.cpp
@@ -252,8 +252,8 @@ static Error parseSegmentLoadCommand(
if (Obj->getHeader().filetype != MachO::MH_DYLIB_STUB &&
Obj->getHeader().filetype != MachO::MH_DSYM &&
s.flags != MachO::S_ZEROFILL &&
- s.flags != MachO::S_THREAD_LOCAL_ZEROFILL &&
- S.fileoff == 0 && s.offset < SizeOfHeaders && s.size != 0)
+ s.flags != MachO::S_THREAD_LOCAL_ZEROFILL && S.fileoff == 0 &&
+ s.offset < SizeOfHeaders && s.size != 0)
return malformedError("offset field of section " + Twine(J) + " in " +
CmdName + " command " + Twine(LoadCommandIndex) +
" not past the headers of the file");
@@ -278,25 +278,24 @@ static Error parseSegmentLoadCommand(
Twine(LoadCommandIndex) +
" greater than the segment");
if (Obj->getHeader().filetype != MachO::MH_DYLIB_STUB &&
- Obj->getHeader().filetype != MachO::MH_DSYM &&
- s.size != 0 && s.addr < S.vmaddr)
- return malformedError("addr field of section " +
- Twine(J) + " in " + CmdName + " command " +
- Twine(LoadCommandIndex) +
- " less than the segment's vmaddr");
+ Obj->getHeader().filetype != MachO::MH_DSYM && s.size != 0 &&
+ s.addr < S.vmaddr)
+ return malformedError("addr field of section " + Twine(J) + " in " +
+ CmdName + " command " + Twine(LoadCommandIndex) +
+ " less than the segment's vmaddr");
BigSize = s.addr;
BigSize += s.size;
uint64_t BigEnd = S.vmaddr;
BigEnd += S.vmsize;
if (S.vmsize != 0 && s.size != 0 && BigSize > BigEnd)
- return malformedError("addr field plus size of section " +
- Twine(J) + " in " + CmdName + " command " +
- Twine(LoadCommandIndex) + " greater than than "
+ return malformedError("addr field plus size of section " + Twine(J) +
+ " in " + CmdName + " command " +
+ Twine(LoadCommandIndex) +
+ " greater than than "
"the segment's vmaddr plus vmsize");
if (s.reloff > FileSize)
- return malformedError("reloff field of section " +
- Twine(J) + " in " + CmdName + " command " +
- Twine(LoadCommandIndex) +
+ return malformedError("reloff field of section " + Twine(J) + " in " +
+ CmdName + " command " + Twine(LoadCommandIndex) +
" extends past the end of the file");
BigSize = s.nreloc;
BigSize *= sizeof(struct MachO::relocation_info);
@@ -305,7 +304,7 @@ static Error parseSegmentLoadCommand(
return malformedError("reloff field plus nreloc field times sizeof("
"struct relocation_info) of section " +
Twine(J) + " in " + CmdName + " command " +
- Twine(LoadCommandIndex) +
+ Twine(LoadCommandIndex) +
" extends past the end of the file");
}
if (S.fileoff > FileSize)
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index ade9561e879..1e31c74f179 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2218,11 +2218,10 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
int CondCode = CD->getSExtValue();
if (CondCode < ICmpInst::Predicate::FIRST_ICMP_PREDICATE ||
- CondCode >= ICmpInst::Predicate::BAD_ICMP_PREDICATE)
+ CondCode >= ICmpInst::Predicate::BAD_ICMP_PREDICATE)
return DAG.getUNDEF(VT);
- ICmpInst::Predicate IcInput =
- static_cast<ICmpInst::Predicate>(CondCode);
+ ICmpInst::Predicate IcInput = static_cast<ICmpInst::Predicate>(CondCode);
ISD::CondCode CCOpcode = getICmpCondCode(IcInput);
return DAG.getNode(AMDGPUISD::SETCC, DL, VT, Op.getOperand(1),
Op.getOperand(2), DAG.getCondCode(CCOpcode));
@@ -2232,11 +2231,10 @@ SDValue SITargetLowering::LowerINTRINSIC_WO_CHAIN(SDValue Op,
int CondCode = CD->getSExtValue();
if (CondCode <= FCmpInst::Predicate::FCMP_FALSE ||
- CondCode >= FCmpInst::Predicate::FCMP_TRUE)
+ CondCode >= FCmpInst::Predicate::FCMP_TRUE)
return DAG.getUNDEF(VT);
- FCmpInst::Predicate IcInput =
- static_cast<FCmpInst::Predicate>(CondCode);
+ FCmpInst::Predicate IcInput = static_cast<FCmpInst::Predicate>(CondCode);
ISD::CondCode CCOpcode = getFCmpCondCode(IcInput);
return DAG.getNode(AMDGPUISD::SETCC, DL, VT, Op.getOperand(1),
Op.getOperand(2), DAG.getCondCode(CCOpcode));
diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
index b69acc5e5e7..49f96260ae6 100644
--- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp
+++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp
@@ -580,8 +580,8 @@ bool PPCFastISel::PPCEmitLoad(MVT VT, unsigned &ResultReg, Address &Addr,
case PPC::LFD: Opc = IsVSFRC ? PPC::LXSDX : PPC::LFDX; break;
}
- auto MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
- TII.get(Opc), ResultReg);
+ auto MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(Opc),
+ ResultReg);
// If we have an index register defined we use it in the store inst,
// otherwise we use X0 as base as it makes the vector instructions to
OpenPOWER on IntegriCloud