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| author | Nate Begeman <natebegeman@mac.com> | 2006-01-28 03:14:31 +0000 |
|---|---|---|
| committer | Nate Begeman <natebegeman@mac.com> | 2006-01-28 03:14:31 +0000 |
| commit | 595ec734fc08fe7e72b7c3058ed973e91176f768 (patch) | |
| tree | 0e7af7b73ab564b423ab4ce0a94300f72c840111 /llvm/lib | |
| parent | 6c82262289f60b7785bc352d09938df58187d1f8 (diff) | |
| download | bcm5719-llvm-595ec734fc08fe7e72b7c3058ed973e91176f768.tar.gz bcm5719-llvm-595ec734fc08fe7e72b7c3058ed973e91176f768.zip | |
Implement Promote for VAARG, and allow it to be custom promoted for people
who don't want the default behavior (Alpha).
llvm-svn: 25726
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp | 26 | ||||
| -rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelLowering.cpp | 11 | ||||
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelLowering.h | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/IA64/IA64ISelLowering.cpp | 2 |
5 files changed, 45 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp index 48231adc8c1..5bd17d53c34 100644 --- a/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeDAG.cpp @@ -3209,7 +3209,31 @@ SDOperand SelectionDAGLegalize::PromoteOp(SDOperand Op) { Tmp2 = LegalizeOp(Node->getOperand(1)); Result = DAG.getNode(ISD::SRL, NVT, Tmp1, Tmp2); break; - + + case ISD::VAARG: + Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. + Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. + if (TLI.getOperationAction(ISD::VAARG, VT) == TargetLowering::Custom) { + Tmp3 = DAG.getVAArg(VT, Tmp1, Tmp2, Node->getOperand(2)); + Result = TLI.CustomPromoteOperation(Tmp3, DAG); + } else { + SDOperand VAList = DAG.getLoad(TLI.getPointerTy(), Tmp1, Tmp2, + Node->getOperand(2)); + // Increment the pointer, VAList, to the next vaarg + Tmp3 = DAG.getNode(ISD::ADD, TLI.getPointerTy(), VAList, + DAG.getConstant(MVT::getSizeInBits(VT)/8, + TLI.getPointerTy())); + // Store the incremented VAList to the legalized pointer + Tmp3 = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), Tmp3, Tmp2, + Node->getOperand(2)); + // Load the actual argument out of the pointer VAList + Result = DAG.getExtLoad(ISD::EXTLOAD, NVT, Tmp3, VAList, + DAG.getSrcValue(0), VT); + } + // Remember that we legalized the chain. + AddLegalizedOperand(Op.getValue(1), Result.getValue(1)); + break; + case ISD::LOAD: Tmp1 = LegalizeOp(Node->getOperand(0)); // Legalize the chain. Tmp2 = LegalizeOp(Node->getOperand(1)); // Legalize the pointer. diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp index d6cdb32e1d2..78db4554dae 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp @@ -1281,6 +1281,13 @@ SDOperand TargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { return SDOperand(); } +SDOperand TargetLowering::CustomPromoteOperation(SDOperand Op, + SelectionDAG &DAG) { + assert(0 && "CustomPromoteOperation not implemented for this target!"); + abort(); + return SDOperand(); +} + void SelectionDAGLowering::visitFrameReturnAddress(CallInst &I, bool isFrame) { unsigned Depth = (unsigned)cast<ConstantUInt>(I.getOperand(1))->getValue(); std::pair<SDOperand,SDOperand> Result = diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index ac21b563b4b..6779b90bd3a 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -141,6 +141,7 @@ AlphaTargetLowering::AlphaTargetLowering(TargetMachine &TM) : TargetLowering(TM) setOperationAction(ISD::VAEND, MVT::Other, Expand); setOperationAction(ISD::VACOPY, MVT::Other, Custom); setOperationAction(ISD::VAARG, MVT::Other, Custom); + setOperationAction(ISD::VAARG, MVT::i32, Custom); setStackPointerRegisterToSaveRestore(Alpha::R30); @@ -691,3 +692,13 @@ SDOperand AlphaTargetLowering::LowerOperation(SDOperand Op, SelectionDAG &DAG) { return SDOperand(); } + +SDOperand AlphaTargetLowering::CustomPromoteOperation(SDOperand Op, + SelectionDAG &DAG) { + assert(Op.getValueType() == MVT::i32 && + Op.getOpcode() == ISD::VAARG && + "Unknown node to custom promote!"); + + // The code in LowerOperation already handles i32 vaarg + return LowerOperation(Op, DAG); +} diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.h b/llvm/lib/Target/Alpha/AlphaISelLowering.h index 33f87ce8187..fcbaaac190c 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.h +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.h @@ -62,6 +62,7 @@ namespace llvm { /// LowerOperation - Provide custom lowering hooks for some operations. /// virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); + virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); //Friendly names for dumps const char *getTargetNodeName(unsigned Opcode) const; diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp index 4e32972da42..e939fb79b7a 100644 --- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp +++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp @@ -588,7 +588,7 @@ LowerOperation(SDOperand Op, SelectionDAG &DAG) { VAIncr = DAG.getNode(ISD::STORE, MVT::Other, VAList.getValue(1), VAIncr, Op.getOperand(1), Op.getOperand(2)); // Load the actual argument out of the pointer VAList - return DAG.getLoad(VT, VAIncr, VAList, DAG.getSrcValue(0)); + return DAG.getLoad(Op.getValueType(), VAIncr, VAList, DAG.getSrcValue(0)); } case ISD::VASTART: { // vastart just stores the address of the VarArgsFrameIndex slot into the |

