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authorTom Stellard <tstellar@redhat.com>2018-05-29 17:41:59 +0000
committerTom Stellard <tstellar@redhat.com>2018-05-29 17:41:59 +0000
commit57b9342c8009e541f31cf45dca5c5a32385e1ccc (patch)
tree51f92ff19b919728b50a41ffa8d9bdd36e2d2c58 /llvm/lib
parent7d3f9a88b963578e706f98558f3e3da431fdca56 (diff)
downloadbcm5719-llvm-57b9342c8009e541f31cf45dca5c5a32385e1ccc.tar.gz
bcm5719-llvm-57b9342c8009e541f31cf45dca5c5a32385e1ccc.zip
AMDGPU: Split R600 MCInst lowering into its own class
Reviewers: arsenm, nhaehnle Subscribers: kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye Differential Revision: https://reviews.llvm.org/D47307 llvm-svn: 333439
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp34
1 files changed, 29 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
index 26a0726cfe9..6aaa46e0603 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUMCInstLower.cpp
@@ -41,14 +41,14 @@ namespace {
class AMDGPUMCInstLower {
MCContext &Ctx;
- const AMDGPUSubtarget &ST;
+ const TargetSubtargetInfo &ST;
const AsmPrinter &AP;
const MCExpr *getLongBranchBlockExpr(const MachineBasicBlock &SrcBB,
const MachineOperand &MO) const;
public:
- AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &ST,
+ AMDGPUMCInstLower(MCContext &ctx, const TargetSubtargetInfo &ST,
const AsmPrinter &AP);
bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
@@ -58,11 +58,22 @@ public:
};
+class R600MCInstLower : public AMDGPUMCInstLower {
+public:
+ R600MCInstLower(MCContext &ctx, const R600Subtarget &ST,
+ const AsmPrinter &AP);
+
+ /// Lower a MachineInstr to an MCInst
+ void lower(const MachineInstr *MI, MCInst &OutMI) const;
+};
+
+
} // End anonymous namespace
#include "AMDGPUGenMCPseudoLowering.inc"
-AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx, const AMDGPUSubtarget &st,
+AMDGPUMCInstLower::AMDGPUMCInstLower(MCContext &ctx,
+ const TargetSubtargetInfo &st,
const AsmPrinter &ap):
Ctx(ctx), ST(st), AP(ap) { }
@@ -153,7 +164,7 @@ bool AMDGPUMCInstLower::lowerOperand(const MachineOperand &MO,
void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
unsigned Opcode = MI->getOpcode();
- const auto *TII = ST.getInstrInfo();
+ const auto *TII = static_cast<const SIInstrInfo*>(ST.getInstrInfo());
// FIXME: Should be able to handle this with emitPseudoExpansionLowering. We
// need to select it to the subtarget specific version, and there's no way to
@@ -325,9 +336,22 @@ void AMDGPUAsmPrinter::EmitInstruction(const MachineInstr *MI) {
}
}
+R600MCInstLower::R600MCInstLower(MCContext &Ctx, const R600Subtarget &ST,
+ const AsmPrinter &AP) :
+ AMDGPUMCInstLower(Ctx, ST, AP) { }
+
+void R600MCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
+ OutMI.setOpcode(MI->getOpcode());
+ for (const MachineOperand &MO : MI->explicit_operands()) {
+ MCOperand MCOp;
+ lowerOperand(MO, MCOp);
+ OutMI.addOperand(MCOp);
+ }
+}
+
void R600AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const R600Subtarget &STI = MF->getSubtarget<R600Subtarget>();
- AMDGPUMCInstLower MCInstLowering(OutContext, STI, *this);
+ R600MCInstLower MCInstLowering(OutContext, STI, *this);
StringRef Err;
if (!STI.getInstrInfo()->verifyInstruction(*MI, Err)) {
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