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| author | Chris Lattner <sabre@nondot.org> | 2006-12-05 18:25:10 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-12-05 18:25:10 +0000 |
| commit | 57a41985e36d3342a943be43864e9ca65e49786d (patch) | |
| tree | 823e5565020eb9fb3b721299c9aa50d2c4111363 /llvm/lib | |
| parent | 55c17f917705e071d906523e8c84c1f0c0d35f21 (diff) | |
| download | bcm5719-llvm-57a41985e36d3342a943be43864e9ca65e49786d.tar.gz bcm5719-llvm-57a41985e36d3342a943be43864e9ca65e49786d.zip | |
Add a perf optzn corresponding to PR1033.
llvm-svn: 32229
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/README-SSE.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/README-SSE.txt b/llvm/lib/Target/X86/README-SSE.txt index 2685956dc1a..b80661a5b79 100644 --- a/llvm/lib/Target/X86/README-SSE.txt +++ b/llvm/lib/Target/X86/README-SSE.txt @@ -18,6 +18,11 @@ Think about doing i64 math in SSE regs. //===---------------------------------------------------------------------===// +Bitcast to<->from SSE registers should use movd/movq instead of going through +the stack. Testcase here: CodeGen/X86/bitcast.ll + +//===---------------------------------------------------------------------===// + This testcase should have no SSE instructions in it, and only one load from a constant pool: |
