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| author | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2019-06-06 12:38:11 +0000 |
|---|---|---|
| committer | Adhemerval Zanella <adhemerval.zanella@linaro.org> | 2019-06-06 12:38:11 +0000 |
| commit | 559e69a821bc2d20651383bb9b1a43d19dc6e8b0 (patch) | |
| tree | 440ce5c8e872e0c234db805523d85b840e37ab2f /llvm/lib | |
| parent | f1249442cf3beacdf18fad448351285173069d44 (diff) | |
| download | bcm5719-llvm-559e69a821bc2d20651383bb9b1a43d19dc6e8b0.tar.gz bcm5719-llvm-559e69a821bc2d20651383bb9b1a43d19dc6e8b0.zip | |
AArch64] Handle ISD::LRINT and ISD::LLRINT for float16
This patch is a follow up for D62018 to add lrint/llrint
support for float16.
Reviewed By: SjoerdMeijer
Differential Revision: https://reviews.llvm.org/D62863
llvm-svn: 362700
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.td | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.td b/llvm/lib/Target/AArch64/AArch64InstrInfo.td index dde05404365..9c19e3cdf51 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.td +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.td @@ -3168,6 +3168,14 @@ let Predicates = [HasFRInt3264] in { defm FRINT64X : FRIntNNT<0b11, "frint64x">; } // HasFRInt3264 +let Predicates = [HasFullFP16] in { + def : Pat<(i32 (lrint f16:$Rn)), + (FCVTZSUWHr (!cast<Instruction>(FRINTXHr) f16:$Rn))>; + def : Pat<(i64 (lrint f16:$Rn)), + (FCVTZSUXHr (!cast<Instruction>(FRINTXHr) f16:$Rn))>; + def : Pat<(i64 (llrint f16:$Rn)), + (FCVTZSUXHr (!cast<Instruction>(FRINTXHr) f16:$Rn))>; +} def : Pat<(i32 (lrint f32:$Rn)), (FCVTZSUWSr (!cast<Instruction>(FRINTXSr) f32:$Rn))>; def : Pat<(i32 (lrint f64:$Rn)), |
