diff options
| author | Keno Fischer <kfischer@college.harvard.edu> | 2016-06-01 20:31:07 +0000 |
|---|---|---|
| committer | Keno Fischer <kfischer@college.harvard.edu> | 2016-06-01 20:31:07 +0000 |
| commit | 5573483c5bfff1fe65816efa34941e62998aefdb (patch) | |
| tree | ed96579d88753c6966f0469d25dcf66fe5a903dd /llvm/lib | |
| parent | 0c09517867cf18cdb5626e33500660317a27f675 (diff) | |
| download | bcm5719-llvm-5573483c5bfff1fe65816efa34941e62998aefdb.tar.gz bcm5719-llvm-5573483c5bfff1fe65816efa34941e62998aefdb.zip | |
[PPC64] Fix SUBFC8 Defs list
Fix PR27943 "Bad machine code: Using an undefined physical register".
SUBFC8 implicitly defines the CR0 register, but this was omitted in
the instruction definition.
Patch by Jameson Nash <jameson@juliacomputing.com>
Reviewers: hfinkel
Differential Revision: http://reviews.llvm.org/D20802
llvm-svn: 271425
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstr64Bit.td | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrInfo.cpp | 2 |
2 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 52af29356d1..e7eb8a16180 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -514,11 +514,11 @@ let Defs = [CARRY] in { def SUBFIC8: DForm_2< 8, (outs g8rc:$rD), (ins g8rc:$rA, s16imm64:$imm), "subfic $rD, $rA, $imm", IIC_IntGeneral, [(set i64:$rD, (subc imm64SExt16:$imm, i64:$rA))]>; -defm SUBFC8 : XOForm_1r<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), +} +defm SUBFC8 : XOForm_1rc<31, 8, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), "subfc", "$rT, $rA, $rB", IIC_IntGeneral, [(set i64:$rT, (subc i64:$rB, i64:$rA))]>, PPC970_DGroup_Cracked; -} defm SUBF8 : XOForm_1r<31, 40, 0, (outs g8rc:$rT), (ins g8rc:$rA, g8rc:$rB), "subf", "$rT, $rA, $rB", IIC_IntGeneral, [(set i64:$rT, (sub i64:$rB, i64:$rA))]>; diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp index 313ab8846ad..9d8e29c462c 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp +++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.cpp @@ -1795,6 +1795,8 @@ bool PPCInstrInfo::optimizeCompareInstr(MachineInstr *CmpInstr, MI->addOperand(*MI->getParent()->getParent(), MachineOperand::CreateReg(*ImpUses, false, true)); } + assert(MI->definesRegister(PPC::CR0) && + "Record-form instruction does not define cr0?"); // Modify the condition code of operands in OperandsToUpdate. // Since we have SUB(r1, r2) and CMP(r2, r1), the condition code needs to |
