[FastISel][AArch64] Use the target-dependent selection code for shifts first.

This uses the target-dependent selection code for shifts first, which allows us
to create better code for shifts with immediates and sign-/zero-extend folding.

Vector type are not handled yet and the code falls back to target-independent
instruction selection for these cases.

This fixes rdar://problem/17907920.

llvm-svn: 216985

1 files changed, 6 insertions, 6 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index 280d11af470..75163807565 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -3475,16 +3475,16 @@ bool AArch64FastISel::TargetSelectInstruction(const Instruction *I) {
   case Instruction::FRem:
     return SelectBinaryOp(I, ISD::FREM);
   case Instruction::Shl:
-    if (!SelectBinaryOp(I, ISD::SHL))
-      return SelectShift(I);
+    if (!SelectShift(I))
+      return SelectBinaryOp(I, ISD::SHL);
     return true;
   case Instruction::LShr:
-    if (!SelectBinaryOp(I, ISD::SRL))
-      return SelectShift(I);
+    if (!SelectShift(I))
+      return SelectBinaryOp(I, ISD::SRL);
     return true;
   case Instruction::AShr:
-    if (!SelectBinaryOp(I, ISD::SRA))
-      return SelectShift(I);
+    if (!SelectShift(I))
+      return SelectBinaryOp(I, ISD::SRA);
     return true;
   case Instruction::And:
     return SelectBinaryOp(I, ISD::AND);