diff options
author | Craig Topper <craig.topper@gmail.com> | 2016-08-22 01:37:16 +0000 |
---|---|---|
committer | Craig Topper <craig.topper@gmail.com> | 2016-08-22 01:37:16 +0000 |
commit | 522541231ad117b9da78e9329ee862d3d7e48b3b (patch) | |
tree | b3aebdb8ecaf9e28b021a1b83d403fc84f8c4ca5 /llvm/lib | |
parent | 9d0b53129cb2532124034eb546a5d508549a337a (diff) | |
download | bcm5719-llvm-522541231ad117b9da78e9329ee862d3d7e48b3b.tar.gz bcm5719-llvm-522541231ad117b9da78e9329ee862d3d7e48b3b.zip |
[X86] Remove ignoreVEX_L from TSFlags. Only the disassembler needs it and the disassembler doesn't use TSFlags. NFC
llvm-svn: 279411
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h | 15 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrFormats.td | 17 |
2 files changed, 9 insertions, 23 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h index b4195176f90..5b34969111f 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h +++ b/llvm/lib/Target/X86/MCTargetDesc/X86BaseInfo.h @@ -506,21 +506,8 @@ namespace X86II { VEX_LShift = VEX_I8IMMShift + 1, VEX_L = 1ULL << VEX_LShift, - // VEX_LIG - Specifies that this instruction ignores the L-bit in the VEX - // prefix. Usually used for scalar instructions. Needed by disassembler. - VEX_LIGShift = VEX_LShift + 1, - VEX_LIG = 1ULL << VEX_LIGShift, - - // TODO: we should combine VEX_L and VEX_LIG together to form a 2-bit field - // with following encoding: - // - 00 V128 - // - 01 V256 - // - 10 V512 - // - 11 LIG (but, in insn encoding, leave VEX.L and EVEX.L in zeros. - // this will save 1 tsflag bit - // EVEX_K - Set if this instruction requires masking - EVEX_KShift = VEX_LIGShift + 1, + EVEX_KShift = VEX_LShift + 1, EVEX_K = 1ULL << EVEX_KShift, // EVEX_Z - Set if this instruction has EVEX.Z field set. diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td index 8cbadd38faf..f75700c651b 100644 --- a/llvm/lib/Target/X86/X86InstrFormats.td +++ b/llvm/lib/Target/X86/X86InstrFormats.td @@ -320,16 +320,15 @@ class X86Inst<bits<8> opcod, Format f, ImmType i, dag outs, dag ins, let TSFlags{41} = hasVEX_4VOp3; let TSFlags{42} = hasVEX_i8ImmReg; let TSFlags{43} = hasVEX_L; - let TSFlags{44} = ignoresVEX_L; - let TSFlags{45} = hasEVEX_K; - let TSFlags{46} = hasEVEX_Z; - let TSFlags{47} = hasEVEX_L2; - let TSFlags{48} = hasEVEX_B; + let TSFlags{44} = hasEVEX_K; + let TSFlags{45} = hasEVEX_Z; + let TSFlags{46} = hasEVEX_L2; + let TSFlags{47} = hasEVEX_B; // If we run out of TSFlags bits, it's possible to encode this in 3 bits. - let TSFlags{55-49} = CD8_Scale; - let TSFlags{56} = has3DNow0F0FOpcode; - let TSFlags{57} = hasMemOp4Prefix; - let TSFlags{58} = hasEVEX_RC; + let TSFlags{54-48} = CD8_Scale; + let TSFlags{55} = has3DNow0F0FOpcode; + let TSFlags{56} = hasMemOp4Prefix; + let TSFlags{57} = hasEVEX_RC; } class PseudoI<dag oops, dag iops, list<dag> pattern> |