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authorChris Lattner <sabre@nondot.org>2005-04-09 03:22:30 +0000
committerChris Lattner <sabre@nondot.org>2005-04-09 03:22:30 +0000
commit4f77badaa39cd48147fdaeb9b46c8e4b79a2ecb6 (patch)
tree4084e488934e6cee7ac067f5f2ad240ebb68139d /llvm/lib
parent4b1323e8464fcda49ed06b2a5e2f3de44f57d7e4 (diff)
downloadbcm5719-llvm-4f77badaa39cd48147fdaeb9b46c8e4b79a2ecb6.tar.gz
bcm5719-llvm-4f77badaa39cd48147fdaeb9b46c8e4b79a2ecb6.zip
This target does not yet support ISD::BRCONDTWOWAY
llvm-svn: 21163
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp1
-rw-r--r--llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp1
2 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
index aea11e4b12d..7ad633a39d8 100644
--- a/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
+++ b/llvm/lib/Target/PowerPC/PPC32ISelPattern.cpp
@@ -49,6 +49,7 @@ namespace {
addRegisterClass(MVT::f64, PPC32::FPRCRegisterClass);
// PowerPC has no intrinsics for these particular operations
+ setOperationAction(ISD::BRCONDTWOWAY, MVT::Other, Expand);
setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
diff --git a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
index 773299c3869..0d706f80f8f 100644
--- a/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
+++ b/llvm/lib/Target/PowerPC/PPC64ISelPattern.cpp
@@ -47,6 +47,7 @@ namespace {
addRegisterClass(MVT::f64, PPC64::FPRCRegisterClass);
// PowerPC has no intrinsics for these particular operations
+ setOperationAction(ISD::BRCONDTWOWAY, MVT::Other, Expand);
setOperationAction(ISD::MEMMOVE, MVT::Other, Expand);
setOperationAction(ISD::MEMSET, MVT::Other, Expand);
setOperationAction(ISD::MEMCPY, MVT::Other, Expand);
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