summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-11-05 10:54:03 -0800
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2019-11-05 11:05:13 -0800
commit4f12ba50bb28a1bf5c5131dcdf84121f04b0e584 (patch)
treefb8d571f29d7c78c3179ba1530da57edf3f1db8c /llvm/lib
parent3606b567849a935ef6bf627dec2e6100a8f25c4b (diff)
downloadbcm5719-llvm-4f12ba50bb28a1bf5c5131dcdf84121f04b0e584.tar.gz
bcm5719-llvm-4f12ba50bb28a1bf5c5131dcdf84121f04b0e584.zip
[AMDGPU] Removed dead code handling M0CopyReg
Static analyzer complains about always false condition. See https://bugs.llvm.org/show_bug.cgi?id=43886 Differential Revision: https://reviews.llvm.org/D69860
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp14
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
index f58bc3060c4..efcc7266316 100644
--- a/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp
@@ -771,8 +771,6 @@ bool SIRegisterInfo::spillSGPR(MachineBasicBlock::iterator MI,
assert(SuperReg != AMDGPU::M0 && "m0 should never spill");
- unsigned M0CopyReg = AMDGPU::NoRegister;
-
unsigned EltSize = 4;
const TargetRegisterClass *RC = getPhysRegClass(SuperReg);
@@ -850,11 +848,6 @@ bool SIRegisterInfo::spillSGPR(MachineBasicBlock::iterator MI,
}
}
- if (M0CopyReg != AMDGPU::NoRegister) {
- BuildMI(*MBB, MI, DL, TII->get(AMDGPU::COPY), AMDGPU::M0)
- .addReg(M0CopyReg, RegState::Kill);
- }
-
MI->eraseFromParent();
MFI->addToSpilledSGPRs(NumSubRegs);
return true;
@@ -882,8 +875,6 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI,
assert(SuperReg != AMDGPU::M0 && "m0 should never spill");
- unsigned M0CopyReg = AMDGPU::NoRegister;
-
unsigned EltSize = 4;
const TargetRegisterClass *RC = getPhysRegClass(SuperReg);
@@ -940,11 +931,6 @@ bool SIRegisterInfo::restoreSGPR(MachineBasicBlock::iterator MI,
}
}
- if (M0CopyReg != AMDGPU::NoRegister) {
- BuildMI(*MBB, MI, DL, TII->get(AMDGPU::COPY), AMDGPU::M0)
- .addReg(M0CopyReg, RegState::Kill);
- }
-
MI->eraseFromParent();
return true;
}
OpenPOWER on IntegriCloud