diff options
| author | Jozef Kolek <jozef.kolek@imgtec.com> | 2014-11-19 13:23:58 +0000 |
|---|---|---|
| committer | Jozef Kolek <jozef.kolek@imgtec.com> | 2014-11-19 13:23:58 +0000 |
| commit | 4d55b4d768a666a9110064c8c09f75de3cbdaba7 (patch) | |
| tree | a06240405394a0b7d51fef8ec525b58ebb2728ce /llvm/lib | |
| parent | 73f64eac8c26829be741a34dd824a20e39bc9c88 (diff) | |
| download | bcm5719-llvm-4d55b4d768a666a9110064c8c09f75de3cbdaba7.tar.gz bcm5719-llvm-4d55b4d768a666a9110064c8c09f75de3cbdaba7.zip | |
[mips][microMIPS] Implement CodeGen support for 16-bit instruction ADDIUR2.
Differential Revision: http://reviews.llvm.org/D5800
llvm-svn: 222352
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MicroMipsInstrInfo.td | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td index a1067787934..4a4cca9ba1b 100644 --- a/llvm/lib/Target/Mips/MicroMipsInstrInfo.td +++ b/llvm/lib/Target/Mips/MicroMipsInstrInfo.td @@ -31,6 +31,10 @@ def uimm4_andi : Operand<i32> { let EncoderMethod = "getUImm4AndValue"; } +def immSExtAddiur2 : ImmLeaf<i32, [{return Imm == 1 || Imm == -1 || + ((Imm % 4 == 0) && + Imm < 28 && Imm > 0);}]>; + def immSExtAddius5 : ImmLeaf<i32, [{return Imm >= -8 && Imm <= 7;}]>; def immZExtAndi16 : ImmLeaf<i32, @@ -528,6 +532,8 @@ let Predicates = [InMicroMips] in { // MicroMips arbitrary patterns that map to one or more instructions //===----------------------------------------------------------------------===// +def : MipsPat<(add GPRMM16:$src, immSExtAddiur2:$imm), + (ADDIUR2_MM GPRMM16:$src, immSExtAddiur2:$imm)>; def : MipsPat<(add GPR32:$src, immSExtAddius5:$imm), (ADDIUS5_MM GPR32:$src, immSExtAddius5:$imm)>; def : MipsPat<(add GPR32:$src, immSExt16:$imm), |
