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authorRoland Froese <froese@ca.ibm.com>2019-04-26 16:14:17 +0000
committerRoland Froese <froese@ca.ibm.com>2019-04-26 16:14:17 +0000
commit4b17772b9ee7a58dccbddec99b833d6100d62a97 (patch)
tree977c0c4ed007a81201f48694d32f9e9275665bed /llvm/lib
parent5f184f17800ea2ac27be5e4ab540cb94a46e80c7 (diff)
downloadbcm5719-llvm-4b17772b9ee7a58dccbddec99b833d6100d62a97.tar.gz
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[PowerPC] Update P9 vector costs for insert/extract element
The PPC vector cost model values for insert/extract element reflect older processors that lacked vector insert/extract and move-to/move-from VSR instructions. Update getVectorInstrCost to give appropriate values for when the newer instructions are present. Differential Revision: https://reviews.llvm.org/D60160 llvm-svn: 359313
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp29
1 files changed, 29 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
index 6185355f419..1fdaec076b1 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetTransformInfo.cpp
@@ -412,6 +412,35 @@ int PPCTTIImpl::getVectorInstrCost(unsigned Opcode, Type *Val, unsigned Index) {
return 0;
return Cost;
+
+ } else if (Val->getScalarType()->isIntegerTy() && Index != -1U) {
+ if (ST->hasP9Altivec()) {
+ if (ISD == ISD::INSERT_VECTOR_ELT)
+ // A move-to VSR and a permute/insert. Assume vector operation cost
+ // for both (cost will be 2x on P9).
+ return vectorCostAdjustment(2, Opcode, Val, nullptr);
+
+ // It's an extract. Maybe we can do a cheap move-from VSR.
+ unsigned EltSize = Val->getScalarSizeInBits();
+ if (EltSize == 64) {
+ unsigned MfvsrdIndex = ST->isLittleEndian() ? 1 : 0;
+ if (Index == MfvsrdIndex)
+ return 1;
+ } else if (EltSize == 32) {
+ unsigned MfvsrwzIndex = ST->isLittleEndian() ? 2 : 1;
+ if (Index == MfvsrwzIndex)
+ return 1;
+ }
+
+ // We need a vector extract (or mfvsrld). Assume vector operation cost.
+ // The cost of the load constant for a vector extract is disregarded
+ // (invariant, easily schedulable).
+ return vectorCostAdjustment(1, Opcode, Val, nullptr);
+
+ } else if (ST->hasDirectMove())
+ // Assume permute has standard cost.
+ // Assume move-to/move-from VSR have 2x standard cost.
+ return 3;
}
// Estimated cost of a load-hit-store delay. This was obtained
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