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author | Evan Cheng <evan.cheng@apple.com> | 2008-03-18 23:36:35 +0000 |
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committer | Evan Cheng <evan.cheng@apple.com> | 2008-03-18 23:36:35 +0000 |
commit | 484064370a2e1879c16c327f28d97b0538d50060 (patch) | |
tree | 5743054796d617cff5c39ff5a32015a8c9f54c37 /llvm/lib | |
parent | 4799ea70ea22df8014bf13a9b1ddf93c047eee56 (diff) | |
download | bcm5719-llvm-484064370a2e1879c16c327f28d97b0538d50060.tar.gz bcm5719-llvm-484064370a2e1879c16c327f28d97b0538d50060.zip |
Fix a x86-64 isel lowering bug that's been around forever. A x86-64 varargs function implicitly reads X86::AL, don't clobber it!
llvm-svn: 48515
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 16 |
1 files changed, 10 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 8655eff4882..5a05abac898 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -1746,18 +1746,22 @@ SDOperand X86TargetLowering::LowerCALL(SDOperand Op, SelectionDAG &DAG) { if (IsTailCall) Ops.push_back(DAG.getConstant(FPDiff, MVT::i32)); - // Add an implicit use GOT pointer in EBX. - if (!IsTailCall && !Is64Bit && - getTargetMachine().getRelocationModel() == Reloc::PIC_ && - Subtarget->isPICStyleGOT()) - Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); - // Add argument registers to the end of the list so that they are known live // into the call. for (unsigned i = 0, e = RegsToPass.size(); i != e; ++i) Ops.push_back(DAG.getRegister(RegsToPass[i].first, RegsToPass[i].second.getValueType())); + // Add an implicit use GOT pointer in EBX. + if (!IsTailCall && !Is64Bit && + getTargetMachine().getRelocationModel() == Reloc::PIC_ && + Subtarget->isPICStyleGOT()) + Ops.push_back(DAG.getRegister(X86::EBX, getPointerTy())); + + // Add an implicit use of AL for x86 vararg functions. + if (Is64Bit && isVarArg) + Ops.push_back(DAG.getRegister(X86::AL, MVT::i8)); + if (InFlag.Val) Ops.push_back(InFlag); |