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authorMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-28 17:49:26 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2014-07-28 17:49:26 +0000
commit46645fa102dee90861ea395f592c5758e0eee4f8 (patch)
treecd175a8ea4f4352f380fd63e225eb9f681f81d02 /llvm/lib
parent07bdf7f720effecc77b73a077bfe620390386a32 (diff)
downloadbcm5719-llvm-46645fa102dee90861ea395f592c5758e0eee4f8.tar.gz
bcm5719-llvm-46645fa102dee90861ea395f592c5758e0eee4f8.zip
R600/SI: Implement getOptimalMemOpType
The default guess uses i32. This needs an address space argument to really do the right thing in all cases. llvm-svn: 214104
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/R600/SIISelLowering.cpp20
-rw-r--r--llvm/lib/Target/R600/SIISelLowering.h6
2 files changed, 26 insertions, 0 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp
index a4d4195edde..c3405e10453 100644
--- a/llvm/lib/Target/R600/SIISelLowering.cpp
+++ b/llvm/lib/Target/R600/SIISelLowering.cpp
@@ -274,6 +274,26 @@ bool SITargetLowering::allowsMisalignedMemoryAccesses(EVT VT,
return VT.bitsGT(MVT::i32);
}
+EVT SITargetLowering::getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
+ unsigned SrcAlign, bool IsMemset,
+ bool ZeroMemset,
+ bool MemcpyStrSrc,
+ MachineFunction &MF) const {
+ // FIXME: Should account for address space here.
+
+ // The default fallback uses the private pointer size as a guess for a type to
+ // use. Make sure we switch these to 64-bit accesses.
+
+ if (Size >= 16 && DstAlign >= 4) // XXX: Should only do for global
+ return MVT::v4i32;
+
+ if (Size >= 8 && DstAlign >= 4)
+ return MVT::v2i32;
+
+ // Use the default.
+ return MVT::Other;
+}
+
TargetLoweringBase::LegalizeTypeAction
SITargetLowering::getPreferredVectorAction(EVT VT) const {
if (VT.getVectorNumElements() != 1 && VT.getScalarType().bitsLE(MVT::i16))
diff --git a/llvm/lib/Target/R600/SIISelLowering.h b/llvm/lib/Target/R600/SIISelLowering.h
index d03bc864148..93e97c32357 100644
--- a/llvm/lib/Target/R600/SIISelLowering.h
+++ b/llvm/lib/Target/R600/SIISelLowering.h
@@ -63,6 +63,12 @@ public:
unsigned Align,
bool *IsFast) const override;
+ EVT getOptimalMemOpType(uint64_t Size, unsigned DstAlign,
+ unsigned SrcAlign, bool IsMemset,
+ bool ZeroMemset,
+ bool MemcpyStrSrc,
+ MachineFunction &MF) const override;
+
TargetLoweringBase::LegalizeTypeAction
getPreferredVectorAction(EVT VT) const override;
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