[Hexagon] Check for presence before looking registers up in bit tracker

llvm-svn: 297240

1 files changed, 4 insertions, 0 deletions

diff --git a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
index 28784f0aa31..5fef6083552 100644
--- a/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonBitSimplify.cpp
@@ -2216,6 +2216,8 @@ bool BitSimplification::genBitSplit(MachineInstr *MI,
   for (unsigned S = AVs.find_first(); S; S = AVs.find_next(S)) {
     // The number of leading zeros here should be the number of trailing
     // non-zeros in RC.
+    if (!BT.has(S))
+      continue;
     const BitTracker::RegisterCell &SC = BT.lookup(S);
     if (SC.width() != W || ctlz(SC) != W-Z)
       continue;
@@ -2421,6 +2423,8 @@ bool BitSimplification::simplifyExtractLow(MachineInstr *MI,
   bool Changed = false;
 
   for (unsigned R = AVs.find_first(); R != 0; R = AVs.find_next(R)) {
+    if (!BT.has(R))
+      continue;
     const BitTracker::RegisterCell &SC = BT.lookup(R);
     unsigned SW = SC.width();