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authorChris Lattner <sabre@nondot.org>2006-09-18 04:31:40 +0000
committerChris Lattner <sabre@nondot.org>2006-09-18 04:31:40 +0000
commit420c4bcc8d6d8ca43c84978e1159f70ad4df7f62 (patch)
treecacd3374a62a92440f23ad675d68406f99c3680e /llvm/lib
parent00a07af638f4dda4558a048fa9bb42628d225650 (diff)
downloadbcm5719-llvm-420c4bcc8d6d8ca43c84978e1159f70ad4df7f62.tar.gz
bcm5719-llvm-420c4bcc8d6d8ca43c84978e1159f70ad4df7f62.zip
Implement Transforms/InstCombine/shift-sra.ll:test0
llvm-svn: 30450
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Transforms/Scalar/InstructionCombining.cpp20
1 files changed, 20 insertions, 0 deletions
diff --git a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
index 4d7dfe9e707..4ed827944de 100644
--- a/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
+++ b/llvm/lib/Transforms/Scalar/InstructionCombining.cpp
@@ -1089,6 +1089,26 @@ bool InstCombiner::SimplifyDemandedBits(Value *V, uint64_t DemandedMask,
}
break;
case Instruction::Shr:
+ // If this is an arithmetic shift right and only the low-bit is set, we can
+ // always convert this into a logical shr, even if the shift amount is
+ // variable. The low bit of the shift cannot be an input sign bit unless
+ // the shift amount is >= the size of the datatype, which is undefined.
+ if (DemandedMask == 1 && I->getType()->isSigned()) {
+ // Convert the input to unsigned.
+ Instruction *NewVal = new CastInst(I->getOperand(0),
+ I->getType()->getUnsignedVersion(),
+ I->getOperand(0)->getName());
+ InsertNewInstBefore(NewVal, *I);
+ // Perform the unsigned shift right.
+ NewVal = new ShiftInst(Instruction::Shr, NewVal, I->getOperand(1),
+ I->getName());
+ InsertNewInstBefore(NewVal, *I);
+ // Then cast that to the destination type.
+ NewVal = new CastInst(NewVal, I->getType(), I->getName());
+ InsertNewInstBefore(NewVal, *I);
+ return UpdateValueUsesWith(I, NewVal);
+ }
+
if (ConstantUInt *SA = dyn_cast<ConstantUInt>(I->getOperand(1))) {
unsigned ShAmt = SA->getValue();
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