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| author | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-31 18:42:18 +0000 |
|---|---|---|
| committer | Andrew Lenharth <andrewl@lenharth.org> | 2005-05-31 18:42:18 +0000 |
| commit | 41e2981e0acf5619fdd18bad69e356fa6c85e211 (patch) | |
| tree | 30b42801492553c20e5a38a6559209860a2bde1c /llvm/lib | |
| parent | 676e4db6dc8068e71556326c7a98e0f36d77d7b8 (diff) | |
| download | bcm5719-llvm-41e2981e0acf5619fdd18bad69e356fa6c85e211.tar.gz bcm5719-llvm-41e2981e0acf5619fdd18bad69e356fa6c85e211.zip | |
switch to the new live in thing. Really, this time it works
llvm-svn: 22187
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp index deed1905d60..453754ce684 100644 --- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp @@ -210,7 +210,7 @@ AlphaTargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) case MVT::i16: case MVT::i32: case MVT::i64: - args_int[count] = AddLiveIn(MF, args_int[count], getRegClassFor(VT)); + args_int[count] = AddLiveIn(MF, args_int[count], getRegClassFor(MVT::i64)); argt = DAG.getCopyFromReg(args_int[count], VT, DAG.getRoot()); if (VT != MVT::i64) argt = DAG.getNode(ISD::TRUNCATE, VT, argt); |
