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| author | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-12-16 05:53:25 +0000 |
|---|---|---|
| committer | Saleem Abdulrasool <compnerd@compnerd.org> | 2014-12-16 05:53:25 +0000 |
| commit | 417fc6b3034b76340b15141d0187ba7114580ea6 (patch) | |
| tree | 39dd7aa16c35ef89666953b8784e59a83babfa02 /llvm/lib | |
| parent | 8adf2254efa3f9bf58c0bb14e89963471fd9482f (diff) | |
| download | bcm5719-llvm-417fc6b3034b76340b15141d0187ba7114580ea6.tar.gz bcm5719-llvm-417fc6b3034b76340b15141d0187ba7114580ea6.zip | |
ARM: diagnose deprecated syntax
The use of SP and PC in the register list for stores is deprecated on ARM
(ARM ARM A.8.8.199):
ARM deprecates the use of ARM instructions that include the SP or the PC in
the list.
Provide a deprecation warning from the assembler in the case that the syntax is
ever seen.
llvm-svn: 224319
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp | 14 |
2 files changed, 16 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 5b0c6f384e8..db58ea8fca2 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -3167,7 +3167,8 @@ defm LDM : arm_ldst_mult<"ldm", "", 1, 0, LdStMulFrm, IIC_iLoad_m, let mayStore = 1, hasExtraSrcRegAllocReq = 1 in defm STM : arm_ldst_mult<"stm", "", 0, 0, LdStMulFrm, IIC_iStore_m, - IIC_iStore_mu>; + IIC_iStore_mu>, + ComplexDeprecationPredicate<"ARMStore">; } // hasSideEffects diff --git a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp index 50c890cac7d..76107924095 100644 --- a/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp +++ b/llvm/lib/Target/ARM/MCTargetDesc/ARMMCTargetDesc.cpp @@ -75,6 +75,20 @@ static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, return false; } +static bool getARMStoreDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI, + std::string &Info) { + assert(MI.getNumOperands() > 4 && "expected >4 arguments"); + for (unsigned OI = 4, OE = MI.getNumOperands(); OI < OE; ++OI) { + assert(MI.getOperand(OI).isReg() && "expected register"); + if (MI.getOperand(OI).getReg() == ARM::SP || + MI.getOperand(OI).getReg() == ARM::PC) { + Info = "use of SP or PC in the list is deprecated"; + return true; + } + } + return false; +} + #define GET_INSTRINFO_MC_DESC #include "ARMGenInstrInfo.inc" |

