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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-08 06:16:04 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-08 06:16:04 +0000 |
| commit | 417e0072d6af58b735cbbbf9454001ae8915a5dd (patch) | |
| tree | 3c80c194f37ee98af51d66aa306a96323e3cbf8b /llvm/lib | |
| parent | 3fd463a15a9b0dc1075029e041284f8dc460395c (diff) | |
| download | bcm5719-llvm-417e0072d6af58b735cbbbf9454001ae8915a5dd.tar.gz bcm5719-llvm-417e0072d6af58b735cbbbf9454001ae8915a5dd.zip | |
AMDGPU: Enable InferAddressSpaces
llvm-svn: 294408
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 345dc6b4fbf..02fabf24408 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -495,6 +495,7 @@ void AMDGPUPassConfig::addIRPasses() { addPass(createAMDGPUOpenCLImageTypeLoweringPass()); if (TM.getOptLevel() > CodeGenOpt::None) { + addPass(createInferAddressSpacesPass()); addPass(createAMDGPUPromoteAlloca(&TM)); if (EnableSROA) |
