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authorDylan McKay <me@dylanmckay.io>2017-10-04 10:36:07 +0000
committerDylan McKay <me@dylanmckay.io>2017-10-04 10:36:07 +0000
commit3f71f1c91e265d1521dfd953074433234eb6b524 (patch)
tree06e1c474d21f5db6af540599ff537f00f5f48b1f /llvm/lib
parentd00f9c1ef1124341582680c46afc3b8cfef1749e (diff)
downloadbcm5719-llvm-3f71f1c91e265d1521dfd953074433234eb6b524.tar.gz
bcm5719-llvm-3f71f1c91e265d1521dfd953074433234eb6b524.zip
[AVR] Factor out mayLoad in tablegen patterns
Patch by Gergo Erdi. llvm-svn: 314897
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/AVR/AVRInstrInfo.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AVR/AVRInstrInfo.td b/llvm/lib/Target/AVR/AVRInstrInfo.td
index 8c7b6f24392..7d1bfc8d85e 100644
--- a/llvm/lib/Target/AVR/AVRInstrInfo.td
+++ b/llvm/lib/Target/AVR/AVRInstrInfo.td
@@ -1417,6 +1417,7 @@ def STDWPtrQRr : Pseudo<(outs),
// Load program memory operations.
let canFoldAsLoad = 1,
isReMaterializable = 1,
+mayLoad = 1,
hasSideEffects = 0 in
{
let Defs = [R0],
@@ -1437,8 +1438,7 @@ hasSideEffects = 0 in
Requires<[HasLPMX]>;
// Load program memory, while postincrementing the Z register.
- let mayLoad = 1,
- Defs = [R31R30] in
+ let Defs = [R31R30] in
{
def LPMRdZPi : FLPMX<0,
1,
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