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| author | Craig Topper <craig.topper@intel.com> | 2019-01-05 18:48:11 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-01-05 18:48:11 +0000 |
| commit | 3f48dbf72e2267b85bab1d5924f264569c4db09f (patch) | |
| tree | e90f2d8d1c96cc9e0e81ef6efe8e69791c9f0c5c /llvm/lib | |
| parent | da32d7f1479d3b8016af0da55a15c13cd1369d94 (diff) | |
| download | bcm5719-llvm-3f48dbf72e2267b85bab1d5924f264569c4db09f.tar.gz bcm5719-llvm-3f48dbf72e2267b85bab1d5924f264569c4db09f.zip | |
[X86] Allow LowerTRUNCATE to use PACKUS/PACKSS for v16i16->v16i8 truncate when -mprefer-vector-width-256 is in effect and BWI is not available.
llvm-svn: 350473
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 25a93e94990..4056b4982b0 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -17949,9 +17949,10 @@ static SDValue truncateVectorWithPACK(unsigned Opcode, EVT DstVT, SDValue In, const X86Subtarget &Subtarget) { assert((Opcode == X86ISD::PACKSS || Opcode == X86ISD::PACKUS) && "Unexpected PACK opcode"); + assert(DstVT.isVector() && "VT not a vector?"); // Requires SSE2 but AVX512 has fast vector truncate. - if (!Subtarget.hasSSE2() || Subtarget.hasAVX512() || !DstVT.isVector()) + if (!Subtarget.hasSSE2()) return SDValue(); EVT SrcVT = In.getValueType(); @@ -36899,6 +36900,7 @@ static SDValue combineTruncateWithSat(SDValue In, EVT VT, const SDLoc &DL, return DAG.getNode(X86ISD::VTRUNCUS, DL, VT, USatVal); } if (VT.isVector() && isPowerOf2_32(VT.getVectorNumElements()) && + !Subtarget.hasAVX512() && (SVT == MVT::i8 || SVT == MVT::i16) && (InSVT == MVT::i16 || InSVT == MVT::i32)) { if (auto USatVal = detectSSatPattern(In, VT, true)) { |
