diff options
author | Bill Wendling <isanbard@gmail.com> | 2007-12-08 23:58:46 +0000 |
---|---|---|
committer | Bill Wendling <isanbard@gmail.com> | 2007-12-08 23:58:46 +0000 |
commit | 3f19dfe79472b2bddfb195d216cf1e407ac24bbf (patch) | |
tree | 1d43e6862ed9ce14db70709b93ccc2c817b8222d /llvm/lib | |
parent | e48fc804460d939640f2618d008b6eba5bcb37d5 (diff) | |
download | bcm5719-llvm-3f19dfe79472b2bddfb195d216cf1e407ac24bbf.tar.gz bcm5719-llvm-3f19dfe79472b2bddfb195d216cf1e407ac24bbf.zip |
Reverting 44702. It wasn't correct to rename them.
llvm-svn: 44727
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/CodeGen/LiveIntervalAnalysis.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 26 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.h | 2 |
4 files changed, 16 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp index f4144e3900b..d151da3a946 100644 --- a/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp +++ b/llvm/lib/CodeGen/LiveIntervalAnalysis.cpp @@ -613,7 +613,7 @@ bool LiveIntervals::isReMaterializable(const LiveInterval &li, return false; isLoad = false; - if (tii_->hasNoSideEffects(MI)) { + if (tii_->isTriviallyReMaterializable(MI)) { isLoad = MI->getInstrDescriptor()->Flags & M_LOAD_FLAG; return true; } diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index 0f8c01c497d..c66e0620bc7 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -39,7 +39,7 @@ namespace { cl::desc("Perform loop-invariant code motion on machine code")); } -STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loop"); +STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops"); namespace { class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { @@ -93,11 +93,11 @@ namespace { /// void MapVirtualRegisterDefs(const MachineFunction &MF); - /// isInSubLoop - A little predicate that returns true if the specified + /// IsInSubLoop - A little predicate that returns true if the specified /// basic block is in a subloop of the current one, not the current one /// itself. /// - bool isInSubLoop(MachineBasicBlock *BB) { + bool IsInSubLoop(MachineBasicBlock *BB) { assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop"); for (MachineLoop::iterator @@ -120,7 +120,7 @@ namespace { if (TID->ImplicitUses || !I.getNumOperands()) return false; MachineOpCode Opcode = TID->Opcode; - return TII->hasNoSideEffects(&I) && + return TII->isTriviallyReMaterializable(&I) && // FIXME: Below necessary? !(TII->isReturn(Opcode) || TII->isTerminatorInstr(Opcode) || @@ -132,12 +132,12 @@ namespace { TII->isStore(Opcode)); } - /// isLoopInvariantInst - Returns true if the instruction is loop + /// IsLoopInvariantInst - Returns true if the instruction is loop /// invariant. I.e., all virtual register operands are defined outside of /// the loop, physical registers aren't accessed (explicitly or implicitly), /// and the instruction is hoistable. /// - bool isLoopInvariantInst(MachineInstr &I); + bool IsLoopInvariantInst(MachineInstr &I); /// FindPredecessors - Get all of the predecessors of the loop that are not /// back-edges. @@ -246,7 +246,7 @@ void MachineLICM::HoistRegion(MachineDomTreeNode *N) { // Only need to process the contents of this block if it is not part of a // subloop (which would already have been processed). - if (!isInSubLoop(BB)) + if (!IsInSubLoop(BB)) for (MachineBasicBlock::iterator I = BB->begin(), E = BB->end(); I != E; ) { MachineInstr &MI = *I++; @@ -263,12 +263,12 @@ void MachineLICM::HoistRegion(MachineDomTreeNode *N) { HoistRegion(Children[I]); } -/// isLoopInvariantInst - Returns true if the instruction is loop +/// IsLoopInvariantInst - Returns true if the instruction is loop /// invariant. I.e., all virtual register operands are defined outside of the /// loop, physical registers aren't accessed (explicitly or implicitly), and the /// instruction is hoistable. /// -bool MachineLICM::isLoopInvariantInst(MachineInstr &I) { +bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { if (!CanHoistInst(I)) return false; // The instruction is loop invariant if all of its operands are loop-invariant @@ -300,7 +300,7 @@ bool MachineLICM::isLoopInvariantInst(MachineInstr &I) { /// that is safe to hoist, this instruction is called to do the dirty work. /// void MachineLICM::Hoist(MachineInstr &MI) { - if (!isLoopInvariantInst(MI)) return; + if (!IsLoopInvariantInst(MI)) return; std::vector<MachineBasicBlock*> Preds; @@ -316,9 +316,9 @@ void MachineLICM::Hoist(MachineInstr &MI) { // the loop header. MachineBasicBlock *MBB = Preds.front(); - // FIXME: We are assuming at first that the basic blocks coming into this loop - // have only one successor each. This isn't the case in general because we - // haven't broken critical edges or added preheaders. + // FIXME: We are assuming at first that the basic block coming into this loop + // has only one successor. This isn't the case in general because we haven't + // broken critical edges or added preheaders. if (MBB->succ_size() != 1) return; assert(*MBB->succ_begin() == CurLoop->getHeader() && "The predecessor doesn't feed directly into the loop header!"); diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 880e2fd2f84..9d5e6371199 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -116,7 +116,7 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI, } -bool X86InstrInfo::isTriviallyReMaterializable(MachineInstr *MI) const { +bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const { switch (MI->getOpcode()) { default: break; case X86::MOV8rm: diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h index 1e6aaf3c30f..2694481caab 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.h +++ b/llvm/lib/Target/X86/X86InstrInfo.h @@ -239,7 +239,7 @@ public: unsigned& destReg) const; unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const; unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const; - bool isTriviallyReMaterializable(MachineInstr *MI) const; + bool isReallyTriviallyReMaterializable(MachineInstr *MI) const; /// convertToThreeAddress - This method must be implemented by targets that /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target |