diff options
| author | Junmo Park <junmoz.park@samsung.com> | 2016-01-06 03:41:30 +0000 |
|---|---|---|
| committer | Junmo Park <junmoz.park@samsung.com> | 2016-01-06 03:41:30 +0000 |
| commit | 3ec882feed9c5293075bc7a4f286ddccc977198a (patch) | |
| tree | c1a053fb105ba4700e3ad7aa752e3f2e3291d98e /llvm/lib | |
| parent | 5a32c7647e90f9fc091a36d04694438c1bcbef00 (diff) | |
| download | bcm5719-llvm-3ec882feed9c5293075bc7a4f286ddccc977198a.tar.gz bcm5719-llvm-3ec882feed9c5293075bc7a4f286ddccc977198a.zip | |
Delete trailing whitespace; NFC
llvm-svn: 256906
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp index 79a84ad8c6c..3d1ab4e3fc2 100644 --- a/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp +++ b/llvm/lib/Target/AArch64/AArch64A57FPLoadBalancing.cpp @@ -158,7 +158,7 @@ INITIALIZE_PASS_END(AArch64A57FPLoadBalancing, DEBUG_TYPE, "AArch64 A57 FP Load-Balancing", false, false) namespace { -/// A Chain is a sequence of instructions that are linked together by +/// A Chain is a sequence of instructions that are linked together by /// an accumulation operand. For example: /// /// fmul d0<def>, ? @@ -285,7 +285,7 @@ public: std::string str() const { std::string S; raw_string_ostream OS(S); - + OS << "{"; StartInst->print(OS, /* SkipOpers= */true); OS << " -> "; @@ -427,7 +427,7 @@ Chain *AArch64A57FPLoadBalancing::getAndEraseNext(Color PreferredColor, return Ch; } } - + // Bailout case - just return the first item. Chain *Ch = L.front(); L.erase(L.begin()); @@ -495,7 +495,7 @@ int AArch64A57FPLoadBalancing::scavengeRegister(Chain *G, Color C, RS.enterBasicBlock(&MBB); RS.forward(MachineBasicBlock::iterator(G->getStart())); - // Can we find an appropriate register that is available throughout the life + // Can we find an appropriate register that is available throughout the life // of the chain? unsigned RegClassID = G->getStart()->getDesc().OpInfo[0].RegClass; BitVector AvailableRegs = RS.getRegsAvailable(TRI->getRegClass(RegClassID)); |

