AArch64/ARM64: produce correct relocation for conditional branches.

llvm-svn: 206391

1 files changed, 5 insertions, 1 deletions

diff --git a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
index 1a132a17ffc..7779b824e0c 100644
--- a/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
+++ b/llvm/lib/Target/ARM64/MCTargetDesc/ARM64ELFObjectWriter.cpp
@@ -83,7 +83,11 @@ unsigned ARM64ELFObjectWriter::GetRelocType(const MCValue &Target,
     case ARM64::fixup_arm64_pcrel_call26:
       return ELF::R_AARCH64_CALL26;
     case ARM64::fixup_arm64_pcrel_imm19:
-      return ELF::R_AARCH64_TLSIE_LD_GOTTPREL_PREL19;
+      // A bit of an oddity here: shared by both "ldr x0, :gottprel:var" and
+      // "b.eq var".
+      if (SymLoc == ARM64MCExpr::VK_GOTTPREL)
+        return ELF::R_AARCH64_TLSIE_LD_GOTTPREL_PREL19;
+      return ELF::R_AARCH64_CONDBR19;
     default:
       llvm_unreachable("Unsupported pc-relative fixup kind");
     }