[MIPS GlobalISel] Add floating point register bank

Add floating point register bank for MIPS32.
Implement getRegBankFromRegClass for float register classes.

Differential Revision: https://reviews.llvm.org/D59643

llvm-svn: 356883

2 files changed, 7 insertions, 0 deletions

diff --git a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
index 214dd106869..08c33a4119c 100644
--- a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
@@ -62,6 +62,11 @@ const RegisterBank &MipsRegisterBankInfo::getRegBankFromRegClass(
   case Mips::GPRMM16MovePPairFirst_and_GPRMM16MovePPairSecondRegClassID:
   case Mips::SP32RegClassID:
     return getRegBank(Mips::GPRBRegBankID);
+  case Mips::FGRCCRegClassID:
+  case Mips::FGR64RegClassID:
+  case Mips::AFGR64RegClassID:
+  case Mips::AFGR64_and_OddSPRegClassID:
+    return getRegBank(Mips::FPRBRegBankID);
   default:
     llvm_unreachable("Register class not supported");
   }
diff --git a/llvm/lib/Target/Mips/MipsRegisterBanks.td b/llvm/lib/Target/Mips/MipsRegisterBanks.td
index b591841dfef..14a0181f8f1 100644
--- a/llvm/lib/Target/Mips/MipsRegisterBanks.td
+++ b/llvm/lib/Target/Mips/MipsRegisterBanks.td
@@ -10,3 +10,5 @@
 //===----------------------------------------------------------------------===//
 
 def GPRBRegBank : RegisterBank<"GPRB", [GPR32]>;
+
+def FPRBRegBank : RegisterBank<"FPRB", [FGR64, AFGR64]>;