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| author | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-24 23:29:07 +0000 |
|---|---|---|
| committer | Jakob Stoklund Olesen <stoklund@2pi.dk> | 2012-08-24 23:29:07 +0000 |
| commit | 3d91b43ad22b69408af224a8d67561038705ec55 (patch) | |
| tree | 0911705a1a70eb5e041a85a72e5547924693901d /llvm/lib | |
| parent | 22708504f2a0fd7ae768a40e70cbfe4e9a4d0d2e (diff) | |
| download | bcm5719-llvm-3d91b43ad22b69408af224a8d67561038705ec55.tar.gz bcm5719-llvm-3d91b43ad22b69408af224a8d67561038705ec55.zip | |
Add missing mayLoad flags to a large class of AVX *_Int instructions.
llvm-svn: 162622
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 6deb3b1c49c..7c389bedeab 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2986,7 +2986,7 @@ multiclass sse1_fp_unop_s_avx<bits<8> opc, string OpcodeStr> { def SSr : SSI<opc, MRMSrcReg, (outs FR32:$dst), (ins FR32:$src1, FR32:$src2), !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []>; - let mayLoad = 1 in + let mayLoad = 1 in { def SSm : SSI<opc, MRMSrcMem, (outs FR32:$dst), (ins FR32:$src1,f32mem:$src2), !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []>; @@ -2994,6 +2994,7 @@ multiclass sse1_fp_unop_s_avx<bits<8> opc, string OpcodeStr> { (ins VR128:$src1, ssmem:$src2), !strconcat(OpcodeStr, "ss\t{$src2, $src1, $dst|$dst, $src1, $src2}"), []>; + } } /// sse1_fp_unop_p - SSE1 unops in packed form. |
