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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-23 22:35:06 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-11-23 22:35:06 +0000 |
| commit | 3ce6a545c7be2603bac2fa5c94e7f8eb02d123e0 (patch) | |
| tree | 07bfb9c9600425b09f5fa64dd0c22e39a339c32e /llvm/lib | |
| parent | 1aa40f46ee8b86bd1ded97cc108301e42506c8ab (diff) | |
| download | bcm5719-llvm-3ce6a545c7be2603bac2fa5c94e7f8eb02d123e0.tar.gz bcm5719-llvm-3ce6a545c7be2603bac2fa5c94e7f8eb02d123e0.zip | |
[X86][SSE] Add awareness of (v)cvtpd2dq and vcvtpd2udq implicit zeroing of upper 64-bits of xmm result
We've already added the equivalent for (v)cvttpd2dq (rL284459) and vcvttpd2udq
llvm-svn: 287835
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrAVX512.td | 21 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 24 |
2 files changed, 30 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td index a3e57fa58c7..7d14154062c 100644 --- a/llvm/lib/Target/X86/X86InstrAVX512.td +++ b/llvm/lib/Target/X86/X86InstrAVX512.td @@ -6546,13 +6546,20 @@ def : Pat<(v2f64 (X86cvtudq2pd (v4i32 VR128X:$src1))), } let Predicates = [HasAVX512, HasVLX] in { - let AddedComplexity = 15 in - def : Pat<(X86vzmovl (v2i64 (bitconvert - (v4i32 (X86cvttpd2dq (v2f64 VR128X:$src)))))), - (VCVTTPD2DQZ128rr VR128:$src)>; - def : Pat<(v4i32 (bitconvert (X86vzmovl (v2i64 (bitconvert - (v4i32 (X86cvttpd2udq (v2f64 VR128X:$src)))))))), - (VCVTTPD2UDQZ128rr VR128:$src)>; + let AddedComplexity = 15 in { + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvtp2Int (v2f64 VR128X:$src)))))), + (VCVTPD2DQZ128rr VR128:$src)>; + def : Pat<(v4i32 (bitconvert (X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvtp2UInt (v2f64 VR128X:$src)))))))), + (VCVTPD2UDQZ128rr VR128:$src)>; + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvttpd2dq (v2f64 VR128X:$src)))))), + (VCVTTPD2DQZ128rr VR128:$src)>; + def : Pat<(v4i32 (bitconvert (X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvttpd2udq (v2f64 VR128X:$src)))))))), + (VCVTTPD2UDQZ128rr VR128:$src)>; + } } let Predicates = [HasAVX512] in { diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index ba1088675c0..818e552d21a 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -2083,10 +2083,14 @@ def : InstAlias<"vcvttpd2dqy\t{$src, $dst|$dst, $src}", (VCVTTPD2DQYrm VR128:$dst, f256mem:$src), 0>; let Predicates = [HasAVX, NoVLX] in { - let AddedComplexity = 15 in - def : Pat<(X86vzmovl (v2i64 (bitconvert - (v4i32 (X86cvttpd2dq (v2f64 VR128:$src)))))), - (VCVTTPD2DQrr VR128:$src)>; + let AddedComplexity = 15 in { + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvtp2Int (v2f64 VR128:$src)))))), + (VCVTPD2DQrr VR128:$src)>; + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvttpd2dq (v2f64 VR128:$src)))))), + (VCVTTPD2DQrr VR128:$src)>; + } } // Predicates = [HasAVX] def CVTTPD2DQrr : PDI<0xE6, MRMSrcReg, (outs VR128:$dst), (ins VR128:$src), @@ -2101,10 +2105,14 @@ def CVTTPD2DQrm : PDI<0xE6, MRMSrcMem, (outs VR128:$dst),(ins f128mem:$src), IIC_SSE_CVT_PD_RM>, Sched<[WriteCvtF2ILd]>; let Predicates = [UseSSE2] in { - let AddedComplexity = 15 in - def : Pat<(X86vzmovl (v2i64 (bitconvert - (v4i32 (X86cvttpd2dq (v2f64 VR128:$src)))))), - (CVTTPD2DQrr VR128:$src)>; + let AddedComplexity = 15 in { + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvtp2Int (v2f64 VR128:$src)))))), + (CVTPD2DQrr VR128:$src)>; + def : Pat<(X86vzmovl (v2i64 (bitconvert + (v4i32 (X86cvttpd2dq (v2f64 VR128:$src)))))), + (CVTTPD2DQrr VR128:$src)>; + } } // Predicates = [UseSSE2] // Convert packed single to packed double |
