summaryrefslogtreecommitdiffstats
path: root/llvm/lib
diff options
context:
space:
mode:
authorNadav Rotem <nadav.rotem@intel.com>2012-01-18 08:33:18 +0000
committerNadav Rotem <nadav.rotem@intel.com>2012-01-18 08:33:18 +0000
commit3b8f0cc9fa9b29e22e8f696a3b2c46ddd742dabf (patch)
tree0d7b213a3b12f3cb6ed31f45f762403ba6721621 /llvm/lib
parent79d01c17606d3dcb92e1b52391115d3a306a84fc (diff)
downloadbcm5719-llvm-3b8f0cc9fa9b29e22e8f696a3b2c46ddd742dabf.tar.gz
bcm5719-llvm-3b8f0cc9fa9b29e22e8f696a3b2c46ddd742dabf.zip
Fix a bug in the type-legalization of vector integers. When we bitcast one vector type to another, we must not bitcast the result if one type is widened while the other is promoted.
llvm-svn: 148383
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp6
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
index 5c56e474b3d..ee5e1a11548 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
@@ -249,8 +249,10 @@ SDValue DAGTypeLegalizer::PromoteIntRes_BITCAST(SDNode *N) {
return DAG.getNode(ISD::BITCAST, dl, NOutVT, InOp);
}
case TargetLowering::TypeWidenVector:
- if (NOutVT.bitsEq(NInVT))
- // The input is widened to the same size. Convert to the widened value.
+ // The input is widened to the same size. Convert to the widened value.
+ // Make sure that the outgoing value is not a vector, because this would
+ // make us bitcast between two vectors which are legalized in different ways.
+ if (NOutVT.bitsEq(NInVT) && !NOutVT.isVector())
return DAG.getNode(ISD::BITCAST, dl, NOutVT, GetWidenedVector(InOp));
}
OpenPOWER on IntegriCloud