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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-11 01:35:00 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-06-11 01:35:00 +0000 |
| commit | 383e72fcfebe5306a152efdab19ad5f532248ed4 (patch) | |
| tree | 0dd84d7f67a96ffdf8ddd5ae7250a107ef4fd8fb /llvm/lib | |
| parent | ef851f9e5b9bb67ead61cbc6d81552954ffef565 (diff) | |
| download | bcm5719-llvm-383e72fcfebe5306a152efdab19ad5f532248ed4.tar.gz bcm5719-llvm-383e72fcfebe5306a152efdab19ad5f532248ed4.zip | |
AMDGPU: Expand < 32-bit atomics
Also fix AtomicExpand asserting on atomicrmw fadd/fsub.
llvm-svn: 363021
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/AtomicExpandPass.cpp | 4 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/AtomicExpandPass.cpp b/llvm/lib/CodeGen/AtomicExpandPass.cpp index bb8b3100ae9..7aca67a327b 100644 --- a/llvm/lib/CodeGen/AtomicExpandPass.cpp +++ b/llvm/lib/CodeGen/AtomicExpandPass.cpp @@ -585,6 +585,10 @@ bool AtomicExpand::tryExpandAtomicRMW(AtomicRMWInst *AI) { unsigned MinCASSize = TLI->getMinCmpXchgSizeInBits() / 8; unsigned ValueSize = getAtomicOpSize(AI); if (ValueSize < MinCASSize) { + // TODO: Handle atomicrmw fadd/fsub + if (AI->getType()->isFloatingPointTy()) + return false; + expandPartwordAtomicRMW(AI, TargetLoweringBase::AtomicExpansionKind::CmpXChg); } else { diff --git a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp index 1f813ef412e..64e710fba7f 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp @@ -523,6 +523,8 @@ AMDGPUTargetLowering::AMDGPUTargetLowering(const TargetMachine &TM, // vector compares until that is fixed. setHasMultipleConditionRegisters(true); + setMinCmpXchgSizeInBits(32); + PredictableSelectIsExpensive = false; // We want to find all load dependencies for long chains of stores to enable |
