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| author | Evandro Menezes <e.menezes@samsung.com> | 2016-06-24 18:58:54 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2016-06-24 18:58:54 +0000 |
| commit | 3830479f4155cd30473453e8bdc5c00c1e013482 (patch) | |
| tree | 026835a6efdf737592f652f5afbb4fe331b17274 /llvm/lib | |
| parent | af567592f8351f994c52aa3a997ec6089473a780 (diff) | |
| download | bcm5719-llvm-3830479f4155cd30473453e8bdc5c00c1e013482.tar.gz bcm5719-llvm-3830479f4155cd30473453e8bdc5c00c1e013482.zip | |
[AArch64] Adjust the model for the vector by element FP multiplies on Exynos M1. (NFC)
llvm-svn: 273708
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedM1.td | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedM1.td b/llvm/lib/Target/AArch64/AArch64SchedM1.td index a0c4ee86771..2288b8dfc22 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedM1.td +++ b/llvm/lib/Target/AArch64/AArch64SchedM1.td @@ -309,10 +309,10 @@ def : InstRW<[M1WriteFVAR15], (instregex "FSQRTv.f32")>; def : InstRW<[M1WriteFVAR23], (instregex "FSQRTv2f64")>; def : InstRW<[M1WriteNMISC1], (instregex "^F(MAX|MIN)(NM)?V?v")>; def : InstRW<[M1WriteNMISC2], (instregex "^F(MAX|MIN)(NM)?Pv")>; -def : InstRW<[M1WriteNEONJ], (instregex "^FMULX?v.+_indexed")>; -def : InstRW<[M1WriteFMAC4], (instregex "^FMULX?v")>; -def : InstRW<[M1WriteNEONK], (instregex "^FML[AS]v.+_indexed")>; -def : InstRW<[M1WriteFMAC5], (instregex "^FML[AS]v")>; +def : InstRW<[M1WriteNEONJ], (instregex "^FMULX?v.i")>; +def : InstRW<[M1WriteFMAC4], (instregex "^FMULX?v.f")>; +def : InstRW<[M1WriteNEONK], (instregex "^FML[AS]v.i")>; +def : InstRW<[M1WriteFMAC5], (instregex "^FML[AS]v.f")>; def : InstRW<[M1WriteFCVT3], (instregex "^FRINT[AIMNPXZ]v")>; // ASIMD miscellaneous instructions. |
