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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-05-01 11:29:36 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-05-01 11:29:36 +0000 |
| commit | 37c2419cc7697a5fc95b4633757a5cbff4f11c95 (patch) | |
| tree | 23b9af3e1d6e82bcb443611bdb7cdbfcdb234dcf /llvm/lib | |
| parent | ccbe567f464b31b48e5681b0011ed51765466974 (diff) | |
| download | bcm5719-llvm-37c2419cc7697a5fc95b4633757a5cbff4f11c95.tar.gz bcm5719-llvm-37c2419cc7697a5fc95b4633757a5cbff4f11c95.zip | |
[X86][SSE] Add X86ISD::PACKSS\PACKUS to SimplifyDemandedVectorEltsForTargetNode vector splitting
llvm-svn: 359673
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 11dda00c9ab..27897ddb4d7 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -33410,15 +33410,21 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode( case X86ISD::PSHUFB: case X86ISD::UNPCKL: case X86ISD::UNPCKH: + // Saturated Packs. + case X86ISD::PACKSS: + case X86ISD::PACKUS: // Horizontal Ops. case X86ISD::HADD: case X86ISD::HSUB: case X86ISD::FHADD: case X86ISD::FHSUB: { SDLoc DL(Op); + MVT ExtVT = VT.getSimpleVT(); + ExtVT = MVT::getVectorVT(ExtVT.getScalarType(), + 128 / ExtVT.getScalarSizeInBits()); SDValue Ext0 = extract128BitVector(Op.getOperand(0), 0, TLO.DAG, DL); SDValue Ext1 = extract128BitVector(Op.getOperand(1), 0, TLO.DAG, DL); - SDValue ExtOp = TLO.DAG.getNode(Opc, DL, Ext0.getValueType(), Ext0, Ext1); + SDValue ExtOp = TLO.DAG.getNode(Opc, DL, ExtVT, Ext0, Ext1); SDValue UndefVec = TLO.DAG.getUNDEF(VT); SDValue Insert = insert128BitVector(UndefVec, ExtOp, 0, TLO.DAG, DL); return TLO.CombineTo(Op, Insert); |
