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authorCraig Topper <craig.topper@intel.com>2018-05-21 23:15:00 +0000
committerCraig Topper <craig.topper@intel.com>2018-05-21 23:15:00 +0000
commit358b09497165f7b77dfa7fd459eb5c1b70d1d897 (patch)
tree2530e06782886d2a83fa9acf301c69ccdbd38490 /llvm/lib
parent040df77ed6fe27889467b1fea6c5f35612c1c0c2 (diff)
downloadbcm5719-llvm-358b09497165f7b77dfa7fd459eb5c1b70d1d897.tar.gz
bcm5719-llvm-358b09497165f7b77dfa7fd459eb5c1b70d1d897.zip
[X86] Remove 128/256-bit cvtdq2ps, cvtudq2ps, cvtqq2pd, cvtuqq2pd intrinsics.
These can all be implemented with sitofp/uitofp instructions. llvm-svn: 332916
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/IR/AutoUpgrade.cpp57
-rw-r--r--llvm/lib/Target/X86/X86IntrinsicsInfo.h14
2 files changed, 33 insertions, 38 deletions
diff --git a/llvm/lib/IR/AutoUpgrade.cpp b/llvm/lib/IR/AutoUpgrade.cpp
index 85202cf7ba4..ba2f3fa9248 100644
--- a/llvm/lib/IR/AutoUpgrade.cpp
+++ b/llvm/lib/IR/AutoUpgrade.cpp
@@ -172,6 +172,12 @@ static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) {
Name.startswith("avx512.mask.pmull.") || // Added in 4.0
Name.startswith("avx512.mask.cvtdq2pd.") || // Added in 4.0
Name.startswith("avx512.mask.cvtudq2pd.") || // Added in 4.0
+ Name == "avx512.mask.cvtudq2ps.128" || // Added in 7.0
+ Name == "avx512.mask.cvtudq2ps.256" || // Added in 7.0
+ Name == "avx512.mask.cvtqq2pd.128" || // Added in 7.0
+ Name == "avx512.mask.cvtqq2pd.256" || // Added in 7.0
+ Name == "avx512.mask.cvtuqq2pd.128" || // Added in 7.0
+ Name == "avx512.mask.cvtuqq2pd.256" || // Added in 7.0
Name == "avx512.mask.cvtdq2ps.128" || // Added in 7.0
Name == "avx512.mask.cvtdq2ps.256" || // Added in 7.0
Name == "avx512.mask.cvtpd2dq.256" || // Added in 7.0
@@ -265,8 +271,10 @@ static bool ShouldUpgradeX86Intrinsic(Function *F, StringRef Name) {
Name == "sse2.cvtsi642sd" || // Added in 7.0
Name == "sse2.cvtss2sd" || // Added in 7.0
Name == "sse2.cvtdq2pd" || // Added in 3.9
+ Name == "sse2.cvtdq2ps" || // Added in 7.0
Name == "sse2.cvtps2pd" || // Added in 3.9
Name == "avx.cvtdq2.pd.256" || // Added in 3.9
+ Name == "avx.cvtdq2.ps.256" || // Added in 7.0
Name == "avx.cvt.ps2.pd.256" || // Added in 3.9
Name.startswith("avx.vinsertf128.") || // Added in 3.7
Name == "avx2.vinserti128" || // Added in 3.7
@@ -1195,10 +1203,6 @@ static bool upgradeAVX512MaskToSelect(StringRef Name, IRBuilder<> &Builder,
IID = Intrinsic::x86_avx512_vpermilvar_pd_512;
else
llvm_unreachable("Unexpected intrinsic");
- } else if (Name == "cvtdq2ps.128") {
- IID = Intrinsic::x86_sse2_cvtdq2ps;
- } else if (Name == "cvtdq2ps.256") {
- IID = Intrinsic::x86_avx_cvtdq2_ps_256;
} else if (Name == "cvtpd2dq.256") {
IID = Intrinsic::x86_avx_cvt_pd2dq_256;
} else if (Name == "cvtpd2ps.256") {
@@ -1607,36 +1611,41 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
Rep = Builder.CreateFPExt(Rep, CI->getType()->getVectorElementType());
Rep = Builder.CreateInsertElement(CI->getArgOperand(0), Rep, (uint64_t)0);
} else if (IsX86 && (Name == "sse2.cvtdq2pd" ||
- Name == "sse2.cvtps2pd" ||
+ Name == "sse2.cvtdq2ps" ||
Name == "avx.cvtdq2.pd.256" ||
+ Name == "avx.cvtdq2.ps.256" ||
+ Name.startswith("avx512.mask.cvtdq2pd.") ||
+ Name.startswith("avx512.mask.cvtudq2pd.") ||
+ Name == "avx512.mask.cvtdq2ps.128" ||
+ Name == "avx512.mask.cvtdq2ps.256" ||
+ Name == "avx512.mask.cvtudq2ps.128" ||
+ Name == "avx512.mask.cvtudq2ps.256" ||
+ Name == "avx512.mask.cvtqq2pd.128" ||
+ Name == "avx512.mask.cvtqq2pd.256" ||
+ Name == "avx512.mask.cvtuqq2pd.128" ||
+ Name == "avx512.mask.cvtuqq2pd.256" ||
+ Name == "sse2.cvtps2pd" ||
Name == "avx.cvt.ps2.pd.256" ||
Name == "avx512.mask.cvtps2pd.128" ||
- Name == "avx512.mask.cvtps2pd.256" ||
- Name.startswith("avx512.mask.cvtdq2pd.") ||
- Name.startswith("avx512.mask.cvtudq2pd."))) {
- // Lossless i32/float to double conversion.
- // Extract the bottom elements if necessary and convert to double vector.
- Value *Src = CI->getArgOperand(0);
- VectorType *SrcTy = cast<VectorType>(Src->getType());
- VectorType *DstTy = cast<VectorType>(CI->getType());
+ Name == "avx512.mask.cvtps2pd.256")) {
+ Type *DstTy = CI->getType();
Rep = CI->getArgOperand(0);
- unsigned NumDstElts = DstTy->getNumElements();
- if (NumDstElts < SrcTy->getNumElements()) {
+ unsigned NumDstElts = DstTy->getVectorNumElements();
+ if (NumDstElts < Rep->getType()->getVectorNumElements()) {
assert(NumDstElts == 2 && "Unexpected vector size");
uint32_t ShuffleMask[2] = { 0, 1 };
- Rep = Builder.CreateShuffleVector(Rep, UndefValue::get(SrcTy),
- ShuffleMask);
+ Rep = Builder.CreateShuffleVector(Rep, Rep, ShuffleMask);
}
- bool SInt2Double = (StringRef::npos != Name.find("cvtdq2"));
- bool UInt2Double = (StringRef::npos != Name.find("cvtudq2"));
- if (SInt2Double)
- Rep = Builder.CreateSIToFP(Rep, DstTy, "cvtdq2pd");
- else if (UInt2Double)
- Rep = Builder.CreateUIToFP(Rep, DstTy, "cvtudq2pd");
- else
+ bool IsPS2PD = (StringRef::npos != Name.find("ps2"));
+ bool IsUnsigned = (StringRef::npos != Name.find("cvtu"));
+ if (IsPS2PD)
Rep = Builder.CreateFPExt(Rep, DstTy, "cvtps2pd");
+ else if (IsUnsigned)
+ Rep = Builder.CreateUIToFP(Rep, DstTy, "cvt");
+ else
+ Rep = Builder.CreateSIToFP(Rep, DstTy, "cvt");
if (CI->getNumArgOperands() == 3)
Rep = EmitX86Select(Builder, CI->getArgOperand(2), Rep,
diff --git a/llvm/lib/Target/X86/X86IntrinsicsInfo.h b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
index 6a91b29cb7a..dca513bf7f8 100644
--- a/llvm/lib/Target/X86/X86IntrinsicsInfo.h
+++ b/llvm/lib/Target/X86/X86IntrinsicsInfo.h
@@ -375,7 +375,6 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(avx_cvt_pd2_ps_256,CVTPD2PS, ISD::FP_ROUND, 0),
X86_INTRINSIC_DATA(avx_cvt_pd2dq_256, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
X86_INTRINSIC_DATA(avx_cvt_ps2dq_256, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
- X86_INTRINSIC_DATA(avx_cvtdq2_ps_256, INTR_TYPE_1OP, ISD::SINT_TO_FP, 0),
X86_INTRINSIC_DATA(avx_cvtt_pd2dq_256,INTR_TYPE_1OP, ISD::FP_TO_SINT, 0),
X86_INTRINSIC_DATA(avx_cvtt_ps2dq_256,INTR_TYPE_1OP, ISD::FP_TO_SINT, 0),
X86_INTRINSIC_DATA(avx_hadd_pd_256, INTR_TYPE_2OP, X86ISD::FHADD, 0),
@@ -589,10 +588,6 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86ISD::CVTP2UI, 0),
X86_INTRINSIC_DATA(avx512_mask_cvtps2uqq_512, INTR_TYPE_1OP_MASK,
X86ISD::CVTP2UI, X86ISD::CVTP2UI_RND),
- X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_128, INTR_TYPE_1OP_MASK,
- ISD::SINT_TO_FP, 0),
- X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_256, INTR_TYPE_1OP_MASK,
- ISD::SINT_TO_FP, 0),
X86_INTRINSIC_DATA(avx512_mask_cvtqq2pd_512, INTR_TYPE_1OP_MASK,
ISD::SINT_TO_FP, X86ISD::SINT_TO_FP_RND),
X86_INTRINSIC_DATA(avx512_mask_cvtqq2ps_128, INTR_TYPE_1OP_MASK,
@@ -647,16 +642,8 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
ISD::FP_TO_UINT, 0),
X86_INTRINSIC_DATA(avx512_mask_cvttps2uqq_512, INTR_TYPE_1OP_MASK,
ISD::FP_TO_UINT, X86ISD::CVTTP2UI_RND),
- X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_128, INTR_TYPE_1OP_MASK,
- ISD::UINT_TO_FP, 0),
- X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_256, INTR_TYPE_1OP_MASK,
- ISD::UINT_TO_FP, 0),
X86_INTRINSIC_DATA(avx512_mask_cvtudq2ps_512, INTR_TYPE_1OP_MASK,
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
- X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_128, INTR_TYPE_1OP_MASK,
- ISD::UINT_TO_FP, 0),
- X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_256, INTR_TYPE_1OP_MASK,
- ISD::UINT_TO_FP, 0),
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2pd_512, INTR_TYPE_1OP_MASK,
ISD::UINT_TO_FP, X86ISD::UINT_TO_FP_RND),
X86_INTRINSIC_DATA(avx512_mask_cvtuqq2ps_128, INTR_TYPE_1OP_MASK,
@@ -1514,7 +1501,6 @@ static const IntrinsicData IntrinsicsWithoutChain[] = {
X86_INTRINSIC_DATA(sse2_comile_sd, COMI, X86ISD::COMI, ISD::SETLE),
X86_INTRINSIC_DATA(sse2_comilt_sd, COMI, X86ISD::COMI, ISD::SETLT),
X86_INTRINSIC_DATA(sse2_comineq_sd, COMI, X86ISD::COMI, ISD::SETNE),
- X86_INTRINSIC_DATA(sse2_cvtdq2ps, INTR_TYPE_1OP, ISD::SINT_TO_FP, 0),
X86_INTRINSIC_DATA(sse2_cvtpd2dq, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
X86_INTRINSIC_DATA(sse2_cvtpd2ps, INTR_TYPE_1OP, X86ISD::VFPROUND, 0),
X86_INTRINSIC_DATA(sse2_cvtps2dq, INTR_TYPE_1OP, X86ISD::CVTP2SI, 0),
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