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authorBrian Cain <bcain@quicinc.com>2019-05-03 16:50:38 +0000
committerBrian Cain <bcain@quicinc.com>2019-05-03 16:50:38 +0000
commit3428c9daef9d513aa67412c8bbe22417956a7aed (patch)
tree9a0bde0cf3c3b121bcb1e00d41d2848cbb8fba85 /llvm/lib
parent33434d5f045072c876b511dbe42af66adb56eae1 (diff)
downloadbcm5719-llvm-3428c9daef9d513aa67412c8bbe22417956a7aed.tar.gz
bcm5719-llvm-3428c9daef9d513aa67412c8bbe22417956a7aed.zip
[hexagon] change AsmParser assertion to error
For immediates that can't be evaluated in assembler-mapped instructions, we should return 'invalid operand' instead of assert. llvm-svn: 359905
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp20
1 files changed, 10 insertions, 10 deletions
diff --git a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
index d5a49a4b431..a77e2898801 100644
--- a/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
+++ b/llvm/lib/Target/Hexagon/AsmParser/HexagonAsmParser.cpp
@@ -1683,8 +1683,8 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
int64_t Value;
MCExpr const &Expr = *Imm.getExpr();
bool Absolute = Expr.evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (!HexagonMCInstrInfo::mustExtend(Expr) &&
((Value <= -256) || Value >= 256))
return Match_InvalidOperand;
@@ -1706,8 +1706,8 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
MCInst TmpInst;
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rd = $Rs
TmpInst.setOpcode(Hexagon::A2_tfr);
MCOperand &Rd = Inst.getOperand(0);
@@ -1736,8 +1736,8 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) { // convert to $Rdd = combine ($Rs[0], $Rs[1])
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
@@ -1860,8 +1860,8 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0)
Inst.setOpcode(Hexagon::S2_vsathub);
else {
@@ -1880,8 +1880,8 @@ int HexagonAsmParser::processInstruction(MCInst &Inst,
MCOperand &Imm = Inst.getOperand(2);
int64_t Value;
bool Absolute = Imm.getExpr()->evaluateAsAbsolute(Value);
- assert(Absolute);
- (void)Absolute;
+ if (!Absolute)
+ return Match_InvalidOperand;
if (Value == 0) {
MCInst TmpInst;
unsigned int RegPairNum = RI->getEncodingValue(Rss.getReg());
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