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| author | Ahsan Saghir <saghir.ibm@gmail.com> | 2020-05-22 14:35:13 -0500 |
|---|---|---|
| committer | Tom Stellard <tstellar@redhat.com> | 2020-06-22 14:58:57 -0700 |
| commit | 3428405fc4ec18b566d64bb1478acd631ccd40f4 (patch) | |
| tree | bc103ae5a5d09f2b6762d22195b0f2069412b16d /llvm/lib | |
| parent | 6f71678ecd293c35435f7f3f313bdaf337ed798a (diff) | |
| download | bcm5719-llvm-3428405fc4ec18b566d64bb1478acd631ccd40f4.tar.gz bcm5719-llvm-3428405fc4ec18b566d64bb1478acd631ccd40f4.zip | |
[PowerPC] Add support for vmsumudm
This patch adds support for Vector Multiply-Sum Unsigned Doubleword Modulo
instruction; vmsumudm.
Differential Revision: https://reviews.llvm.org/D80294
(cherry picked from commit a28e9f1208608f8d18750bb88ca74722fb0bcce4)
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/PowerPC/P9InstrResources.td | 1 | ||||
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCInstrAltivec.td | 4 |
2 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/P9InstrResources.td b/llvm/lib/Target/PowerPC/P9InstrResources.td index 9b3d13989ee..d7e3519d553 100644 --- a/llvm/lib/Target/PowerPC/P9InstrResources.td +++ b/llvm/lib/Target/PowerPC/P9InstrResources.td @@ -373,6 +373,7 @@ def : InstRW<[P9_DPE_7C, P9_DPO_7C, IP_EXECE_1C, IP_EXECO_1C, DISP_1C], VMSUMSHS, VMSUMUBM, VMSUMUHM, + VMSUMUDM, VMSUMUHS, VMULESB, VMULESH, diff --git a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td index f94816a35f7..6e8635f2413 100644 --- a/llvm/lib/Target/PowerPC/PPCInstrAltivec.td +++ b/llvm/lib/Target/PowerPC/PPCInstrAltivec.td @@ -1342,6 +1342,10 @@ def VSBOX : VXBX_Int_Ty<1480, "vsbox", int_ppc_altivec_crypto_vsbox, v2i64>; def HasP9Altivec : Predicate<"PPCSubTarget->hasP9Altivec()">; let Predicates = [HasP9Altivec] in { +// Vector Multiply-Sum +def VMSUMUDM : VA1a_Int_Ty3<35, "vmsumudm", int_ppc_altivec_vmsumudm, + v1i128, v2i64, v1i128>; + // i8 element comparisons. def VCMPNEB : VCMP < 7, "vcmpneb $vD, $vA, $vB" , v16i8>; def VCMPNEB_rec : VCMPo < 7, "vcmpneb. $vD, $vA, $vB" , v16i8>; |
