diff options
author | Andrew Lenharth <andrewl@lenharth.org> | 2006-06-21 01:00:43 +0000 |
---|---|---|
committer | Andrew Lenharth <andrewl@lenharth.org> | 2006-06-21 01:00:43 +0000 |
commit | 336313ce3d68b08295ab21f4ae40fdb9065b649a (patch) | |
tree | f9abbcb6c91b9be5d4412a53eca5e4810727f57b /llvm/lib | |
parent | dc38e6f3222ad5e221df79232219cf877f615c1d (diff) | |
download | bcm5719-llvm-336313ce3d68b08295ab21f4ae40fdb9065b649a.tar.gz bcm5719-llvm-336313ce3d68b08295ab21f4ae40fdb9065b649a.zip |
fix argument problem
llvm-svn: 28893
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelLowering.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp index fda3096e3cf..1b22f754459 100644 --- a/llvm/lib/Target/Alpha/AlphaISelLowering.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelLowering.cpp @@ -210,11 +210,15 @@ static SDOperand LowerFORMAL_ARGUMENTS(SDOperand Op, SelectionDAG &DAG, std::cerr << "Unknown Type " << ObjectVT << "\n"; abort(); case MVT::f64: - case MVT::f32: args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo], &Alpha::F8RCRegClass); ArgVal = DAG.getCopyFromReg(Root, args_float[ArgNo], ObjectVT); break; + case MVT::f32: + args_float[ArgNo] = AddLiveIn(MF, args_float[ArgNo], + &Alpha::F4RCRegClass); + ArgVal = DAG.getCopyFromReg(Root, args_float[ArgNo], ObjectVT); + break; case MVT::i64: args_int[ArgNo] = AddLiveIn(MF, args_int[ArgNo], &Alpha::GPRCRegClass); |