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| author | Jim Grosbach <grosbach@apple.com> | 2008-10-03 15:53:56 +0000 |
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2008-10-03 15:53:56 +0000 |
| commit | 332ad5e01630e1d8c1b976dd7bf1a5a893df8e94 (patch) | |
| tree | 834c5fab5be0e169a5e16be86cd03ab77bf41e74 /llvm/lib | |
| parent | af929abc0114b83df3ad617a21e6b60b1bde9780 (diff) | |
| download | bcm5719-llvm-332ad5e01630e1d8c1b976dd7bf1a5a893df8e94.tar.gz bcm5719-llvm-332ad5e01630e1d8c1b976dd7bf1a5a893df8e94.zip | |
Indexing off by one resulted in errant encoding of source register for
reg->reg moves.
llvm-svn: 57011
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp index 3936afc7171..a8fe2ea4f19 100644 --- a/llvm/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/llvm/lib/Target/ARM/ARMCodeEmitter.cpp @@ -416,7 +416,7 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI, const MachineOperand &MO = MI.getOperand(OpIdx); if (MO.isReg()) // Encode register Rm. - return Binary | getMachineOpValue(MI, NumDefs + 1); + return Binary | getMachineOpValue(MI, NumDefs); // Encode so_imm. // Set bit I(25) to identify this is the immediate form of <shifter_op> |
