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| author | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:26:55 +0000 |
|---|---|---|
| committer | Daniel Sanders <daniel.sanders@imgtec.com> | 2013-09-23 12:26:55 +0000 |
| commit | 3253de49c92b3f8bccce9209555bf153c5237a7b (patch) | |
| tree | d7e40e6b42f5eae849756590295cd3ebbc606042 /llvm/lib | |
| parent | 7a289d0e39c764635c2a8eb44dd0d7c900237baa (diff) | |
| download | bcm5719-llvm-3253de49c92b3f8bccce9209555bf153c5237a7b.tar.gz bcm5719-llvm-3253de49c92b3f8bccce9209555bf153c5237a7b.zip | |
Fix -Wunused-variable error when assertions are disabled and -Werror is in use.
llvm-svn: 191192
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 3b446c5a13a..9532c9d7275 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -162,14 +162,17 @@ addMSAIntType(MVT::SimpleValueType Ty, const TargetRegisterClass *RC) { setOperationAction(ISD::BUILD_VECTOR, Ty, Custom); setOperationAction(ISD::ADD, Ty, Legal); + setOperationAction(ISD::AND, Ty, Legal); setOperationAction(ISD::CTLZ, Ty, Legal); setOperationAction(ISD::MUL, Ty, Legal); + setOperationAction(ISD::OR, Ty, Legal); setOperationAction(ISD::SDIV, Ty, Legal); setOperationAction(ISD::SHL, Ty, Legal); setOperationAction(ISD::SRA, Ty, Legal); setOperationAction(ISD::SRL, Ty, Legal); setOperationAction(ISD::SUB, Ty, Legal); setOperationAction(ISD::UDIV, Ty, Legal); + setOperationAction(ISD::XOR, Ty, Legal); } // Enable MSA support for the given floating-point type and Register class. @@ -895,6 +898,8 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_addv_w: case Intrinsic::mips_addv_d: return lowerMSABinaryIntr(Op, DAG, ISD::ADD); + case Intrinsic::mips_and_v: + return lowerMSABinaryIntr(Op, DAG, ISD::AND); case Intrinsic::mips_bnz_b: case Intrinsic::mips_bnz_h: case Intrinsic::mips_bnz_w: @@ -959,6 +964,8 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_nlzc_w: case Intrinsic::mips_nlzc_d: return lowerMSAUnaryIntr(Op, DAG, ISD::CTLZ); + case Intrinsic::mips_or_v: + return lowerMSABinaryIntr(Op, DAG, ISD::OR); case Intrinsic::mips_sll_b: case Intrinsic::mips_sll_h: case Intrinsic::mips_sll_w: @@ -979,6 +986,8 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, case Intrinsic::mips_subv_w: case Intrinsic::mips_subv_d: return lowerMSABinaryIntr(Op, DAG, ISD::SUB); + case Intrinsic::mips_xor_v: + return lowerMSABinaryIntr(Op, DAG, ISD::XOR); } } @@ -1091,9 +1100,6 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_VOID(SDValue Op, /// so it's possible for this to return false even when isConstantSplat returns /// true. static bool isSplatVector(const BuildVectorSDNode *N) { - EVT VT = N->getValueType(0); - assert(VT.isVector() && "Expected a vector type"); - unsigned int nOps = N->getNumOperands(); assert(nOps > 1 && "isSplat has 0 or 1 sized build vector"); |
