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| author | Jim Grosbach <grosbach@apple.com> | 2011-07-14 18:35:38 +0000 | 
|---|---|---|
| committer | Jim Grosbach <grosbach@apple.com> | 2011-07-14 18:35:38 +0000 | 
| commit | 2f9aeeef3bcaf8d0ba7bef9ad4f5155d904b78ab (patch) | |
| tree | f147b17cea0407575bd1b2538823cce7729ab74f /llvm/lib | |
| parent | 7c37b1cf5176eeb0fd11c90f9cabad12ce01a102 (diff) | |
| download | bcm5719-llvm-2f9aeeef3bcaf8d0ba7bef9ad4f5155d904b78ab.tar.gz bcm5719-llvm-2f9aeeef3bcaf8d0ba7bef9ad4f5155d904b78ab.zip | |
Update ARM Assembly of LDM/STM.
ldm/stm are the cannonical spellings for ldmia/stmia, so use them as such.
Update the parsing/encoding tests accordingly.
llvm-svn: 135168
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 13 | 
1 files changed, 8 insertions, 5 deletions
| diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index 7e5d1363dcb..445ef6cd211 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1975,10 +1975,12 @@ def STRHT: AI3sthpo<(outs GPR:$base_wb), (ins GPR:$Rt, addrmode3:$addr),  multiclass arm_ldst_mult<string asm, bit L_bit, Format f,                           InstrItinClass itin, InstrItinClass itin_upd> { +  // IA is the default, so no need for an explicit suffix on the +  // mnemonic here. Without it is the cannonical spelling.    def IA :      AXI4<(outs), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),           IndexModeNone, f, itin, -         !strconcat(asm, "ia${p}\t$Rn, $regs"), "", []> { +         !strconcat(asm, "${p}\t$Rn, $regs"), "", []> {      let Inst{24-23} = 0b01;       // Increment After      let Inst{21}    = 0;          // No writeback      let Inst{20}    = L_bit; @@ -1986,7 +1988,7 @@ multiclass arm_ldst_mult<string asm, bit L_bit, Format f,    def IA_UPD :      AXI4<(outs GPR:$wb), (ins GPR:$Rn, pred:$p, reglist:$regs, variable_ops),           IndexModeUpd, f, itin_upd, -         !strconcat(asm, "ia${p}\t$Rn!, $regs"), "$Rn = $wb", []> { +         !strconcat(asm, "${p}\t$Rn!, $regs"), "$Rn = $wb", []> {      let Inst{24-23} = 0b01;       // Increment After      let Inst{21}    = 1;          // Writeback      let Inst{20}    = L_bit; @@ -2052,10 +2054,11 @@ defm STM : arm_ldst_mult<"stm", 0, LdStMulFrm, IIC_iStore_m, IIC_iStore_mu>;  } // neverHasSideEffects  // Load / Store Multiple Mnemonic Aliases -def : MnemonicAlias<"ldmfd", "ldmia">; +def : MnemonicAlias<"ldmfd", "ldm">; +def : MnemonicAlias<"ldmia", "ldm">;  def : MnemonicAlias<"stmfd", "stmdb">; -def : MnemonicAlias<"ldm", "ldmia">; -def : MnemonicAlias<"stm", "stmia">; +def : MnemonicAlias<"stmia", "stm">; +def : MnemonicAlias<"stmea", "stm">;  // FIXME: remove when we have a way to marking a MI with these properties.  // FIXME: Should pc be an implicit operand like PICADD, etc? | 

