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| author | Tim Northover <tnorthover@apple.com> | 2014-04-14 12:50:50 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-04-14 12:50:50 +0000 |
| commit | 2f4830343676eb250431e83124500279ea156a26 (patch) | |
| tree | 66167633195d94e1dc31e519ca90edc02bf76fa7 /llvm/lib | |
| parent | 23b1f08282a379b8bcfbb1f4d5055445a822b7ce (diff) | |
| download | bcm5719-llvm-2f4830343676eb250431e83124500279ea156a26.tar.gz bcm5719-llvm-2f4830343676eb250431e83124500279ea156a26.zip | |
ARM64: add support for AArch64's addsub_ext.ll
There was one definite issue in ARM64 (the off-by-1 check for whether
a shift could be folded in) and one difference that is probably
correct: ARM64 didn't fold nodes with multiple uses into the
arithmetic operations unless optimising for code size.
llvm-svn: 206168
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp b/llvm/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp index 43098d5d7af..4938aaad036 100644 --- a/llvm/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp +++ b/llvm/lib/Target/ARM64/ARM64ISelDAGToDAG.cpp @@ -532,7 +532,7 @@ bool ARM64DAGToDAGISel::SelectArithExtendedRegister(SDValue N, SDValue &Reg, if (!CSD) return false; ShiftVal = CSD->getZExtValue(); - if ((ShiftVal & 0x3) != ShiftVal) + if (ShiftVal > 4) return false; Ext = getExtendTypeForNode(N.getOperand(0)); |
