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| author | Eric Christopher <echristo@apple.com> | 2010-08-04 23:03:04 +0000 |
|---|---|---|
| committer | Eric Christopher <echristo@apple.com> | 2010-08-04 23:03:04 +0000 |
| commit | 2db8464282b57f5ece1dea033075e42194c104db (patch) | |
| tree | 972f4fa0a7baedb413f6ad58ea24a5aa13e86ec8 /llvm/lib | |
| parent | fc2320fd73d137497bd4508780b451a71125018b (diff) | |
| download | bcm5719-llvm-2db8464282b57f5ece1dea033075e42194c104db.tar.gz bcm5719-llvm-2db8464282b57f5ece1dea033075e42194c104db.zip | |
Make x86-64 membarriers work without sse and clean up some of the
uses.
llvm-svn: 110274
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86Instr64bit.td | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 4 |
3 files changed, 14 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index af82feb3d72..44c95b5a6ff 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -7654,9 +7654,12 @@ SDValue X86TargetLowering::LowerXALUO(SDValue Op, SelectionDAG &DAG) const { SDValue X86TargetLowering::LowerMEMBARRIER(SDValue Op, SelectionDAG &DAG) const{ DebugLoc dl = Op.getDebugLoc(); - if (!Subtarget->hasSSE2()) + if (!Subtarget->hasSSE2()) { + SDValue Zero = DAG.getConstant(0, + Subtarget->is64Bit() ? MVT::i64 : MVT::i32); return DAG.getNode(X86ISD::MEMBARRIER, dl, MVT::Other, Op.getOperand(0), - DAG.getConstant(0, MVT::i32)); + Zero); + } unsigned isDev = cast<ConstantSDNode>(Op.getOperand(5))->getZExtValue(); if(!isDev) diff --git a/llvm/lib/Target/X86/X86Instr64bit.td b/llvm/lib/Target/X86/X86Instr64bit.td index 9c7c80f2372..04b75f9f8bc 100644 --- a/llvm/lib/Target/X86/X86Instr64bit.td +++ b/llvm/lib/Target/X86/X86Instr64bit.td @@ -1619,6 +1619,13 @@ def MOV64FSrm : RI<0x8B, MRMSrcMem, (outs GR64:$dst), (ins i64mem:$src), // Atomic Instructions //===----------------------------------------------------------------------===// +// TODO: Get this to fold the constant into the instruction. +let Defs = [ESP] in +def Int_MemBarrierNoSSE64 : RI<0x09, MRM1r, (outs), (ins GR64:$zero), + "lock\n\t" + "or{q}\t{$zero, (%rsp)|(%rsp), $zero}", + [(X86MemBarrierNoSSE GR64:$zero)]>, LOCK; + let Defs = [RAX, EFLAGS], Uses = [RAX] in { def LCMPXCHG64 : RI<0xB1, MRMDestMem, (outs), (ins i64mem:$ptr, GR64:$swap), "lock\n\t" diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 367e29c77a6..5fc1bb7be1b 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -3934,8 +3934,8 @@ def Int_MemBarrier : I<0, Pseudo, (outs), (ins), [(X86MemBarrier)]>, Requires<[HasSSE2]>; // TODO: Get this to fold the constant into the instruction. -let Uses = [ESP] in -def Int_MemBarrierNoSSE : I<0x0B, Pseudo, (outs), (ins GR32:$zero), +let Defs = [ESP] in +def Int_MemBarrierNoSSE : I<0x09, MRM1r, (outs), (ins GR32:$zero), "lock\n\t" "or{l}\t{$zero, (%esp)|(%esp), $zero}", [(X86MemBarrierNoSSE GR32:$zero)]>, LOCK; |

