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authorChris Lattner <sabre@nondot.org>2007-02-02 04:36:46 +0000
committerChris Lattner <sabre@nondot.org>2007-02-02 04:36:46 +0000
commit2d5b4ac38f82bd06ffced08f81a25aa84bf49b65 (patch)
tree02a53d1515bd73bfc6b61b98c4173390cd37abfe /llvm/lib
parentb958c7ec8adb30a900946abecd0508eb12ba9f8b (diff)
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llvm-svn: 33778
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/README.txt14
1 files changed, 14 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/README.txt b/llvm/lib/Target/ARM/README.txt
index 000e8e6450a..04bf9588ad4 100644
--- a/llvm/lib/Target/ARM/README.txt
+++ b/llvm/lib/Target/ARM/README.txt
@@ -43,6 +43,20 @@ Among the obvious wins, doing so can eliminate the need to custom expand
copysign (i.e. we won't need to custom expand it to get the conditional
negate).
+This allows us to eliminate one instruction from:
+
+define i32 @_Z6slow4bii(i32 %x, i32 %y) {
+ %tmp = icmp sgt i32 %x, %y
+ %retval = select i1 %tmp, i32 %x, i32 %y
+ ret i32 %retval
+}
+
+__Z6slow4bii:
+ cmp r0, r1
+ movgt r1, r0
+ mov r0, r1
+ bx lr
+
//===---------------------------------------------------------------------===//
Implement long long "X-3" with instructions that fold the immediate in. These
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