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author | Nirav Dave <niravd@google.com> | 2016-02-26 18:55:22 +0000 |
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committer | Nirav Dave <niravd@google.com> | 2016-02-26 18:55:22 +0000 |
commit | 2993854bb464c08f060e1f704f4c0b6dbc9ccda8 (patch) | |
tree | a1126e52cc6f721b6ed8ac1fa65a28494ade2fc6 /llvm/lib | |
parent | 155193c3aa7bc14012b3547847dc4a0fbb4dd8da (diff) | |
download | bcm5719-llvm-2993854bb464c08f060e1f704f4c0b6dbc9ccda8.tar.gz bcm5719-llvm-2993854bb464c08f060e1f704f4c0b6dbc9ccda8.zip |
Fix Sparc 32bit Lowering to rebundle up v2i32 values.
Summary: Fix LowerCall to rebundle v2i32 values after lowering and add testcase
Reviewers: jyknight
Subscribers: llvm-commits, jyknight
Differential Revision: http://reviews.llvm.org/D17615
llvm-svn: 262048
Diffstat (limited to 'llvm/lib')
-rw-r--r-- | llvm/lib/Target/Sparc/SparcISelLowering.cpp | 27 |
1 files changed, 23 insertions, 4 deletions
diff --git a/llvm/lib/Target/Sparc/SparcISelLowering.cpp b/llvm/lib/Target/Sparc/SparcISelLowering.cpp index d78633f567d..4ce211fd5f5 100644 --- a/llvm/lib/Target/Sparc/SparcISelLowering.cpp +++ b/llvm/lib/Target/Sparc/SparcISelLowering.cpp @@ -999,10 +999,29 @@ SparcTargetLowering::LowerCall_32(TargetLowering::CallLoweringInfo &CLI, // Copy all of the result registers out of their specified physreg. for (unsigned i = 0; i != RVLocs.size(); ++i) { - Chain = DAG.getCopyFromReg(Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), - RVLocs[i].getValVT(), InFlag).getValue(1); - InFlag = Chain.getValue(2); - InVals.push_back(Chain.getValue(0)); + if (RVLocs[i].getLocVT() == MVT::v2i32) { + SDValue Vec = DAG.getNode(ISD::UNDEF, dl, MVT::v2i32); + SDValue Lo = DAG.getCopyFromReg( + Chain, dl, toCallerWindow(RVLocs[i++].getLocReg()), MVT::i32, InFlag); + Chain = Lo.getValue(1); + InFlag = Lo.getValue(2); + Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Lo, + DAG.getConstant(0, dl, MVT::i32)); + SDValue Hi = DAG.getCopyFromReg( + Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), MVT::i32, InFlag); + Chain = Hi.getValue(1); + InFlag = Hi.getValue(2); + Vec = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, MVT::v2i32, Vec, Hi, + DAG.getConstant(1, dl, MVT::i32)); + InVals.push_back(Vec); + } else { + Chain = + DAG.getCopyFromReg(Chain, dl, toCallerWindow(RVLocs[i].getLocReg()), + RVLocs[i].getValVT(), InFlag) + .getValue(1); + InFlag = Chain.getValue(2); + InVals.push_back(Chain.getValue(0)); + } } return Chain; |