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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-06-28 15:24:46 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2018-06-28 15:24:46 +0000 |
| commit | 298a61590ab694b33407a56feb60e19145078cac (patch) | |
| tree | 774e65f725f39b9b1db3c0ee4c90a4ae0a606502 /llvm/lib | |
| parent | d93a1e52715f74ad4fe4bf758af0f6b607d3cdf8 (diff) | |
| download | bcm5719-llvm-298a61590ab694b33407a56feb60e19145078cac.tar.gz bcm5719-llvm-298a61590ab694b33407a56feb60e19145078cac.zip | |
[AMDGPU] Overload llvm.amdgcn.fmad.ftz to support f16
Differential Revision: https://reviews.llvm.org/D48677
llvm-svn: 335866
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 14 |
1 files changed, 9 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 87a891bb361..cf0255db561 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -704,15 +704,19 @@ multiclass FMADPat <ValueType vt, Instruction inst> { defm : FMADPat <f16, V_MAC_F16_e64>; defm : FMADPat <f32, V_MAC_F32_e64>; -class FMADModsPat<Instruction inst, SDPatternOperator mad_opr> : GCNPat< - (f32 (mad_opr (VOP3Mods f32:$src0, i32:$src0_mod), - (VOP3Mods f32:$src1, i32:$src1_mod), - (VOP3Mods f32:$src2, i32:$src2_mod))), +class FMADModsPat<Instruction inst, SDPatternOperator mad_opr, ValueType Ty> + : GCNPat< + (Ty (mad_opr (VOP3Mods Ty:$src0, i32:$src0_mod), + (VOP3Mods Ty:$src1, i32:$src1_mod), + (VOP3Mods Ty:$src2, i32:$src2_mod))), (inst $src0_mod, $src0, $src1_mod, $src1, $src2_mod, $src2, DSTCLAMP.NONE, DSTOMOD.NONE) >; -def : FMADModsPat<V_MAD_F32, AMDGPUfmad_ftz>; +def : FMADModsPat<V_MAD_F32, AMDGPUfmad_ftz, f32>; +def : FMADModsPat<V_MAD_F16, AMDGPUfmad_ftz, f16> { + let SubtargetPredicate = Has16BitInsts; +} multiclass SelectPat <ValueType vt, Instruction inst> { def : GCNPat < |
