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authorTim Northover <tnorthover@apple.com>2013-11-14 17:15:39 +0000
committerTim Northover <tnorthover@apple.com>2013-11-14 17:15:39 +0000
commit28adfbb0d1507aa90c3a88c2b0268147aa04fd22 (patch)
treeafe0d7791184d3b349f6cac0ca92f939c2809458 /llvm/lib
parentf04bb72b611f24b79f6eb4a401f78046f47bde6a (diff)
downloadbcm5719-llvm-28adfbb0d1507aa90c3a88c2b0268147aa04fd22.tar.gz
bcm5719-llvm-28adfbb0d1507aa90c3a88c2b0268147aa04fd22.zip
ARM: produce friendly error for invalid inline asm
We used to perform an invalid operation on an MVT and crash, which wasn't much fun. Patch by Oliver Stannard. llvm-svn: 194714
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 9dee9314f68..76a0a831f69 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -10860,6 +10860,8 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
case 'r':
return RCPair(0U, &ARM::GPRRegClass);
case 'w':
+ if (VT == MVT::Other)
+ break;
if (VT == MVT::f32)
return RCPair(0U, &ARM::SPRRegClass);
if (VT.getSizeInBits() == 64)
@@ -10868,6 +10870,8 @@ ARMTargetLowering::getRegForInlineAsmConstraint(const std::string &Constraint,
return RCPair(0U, &ARM::QPRRegClass);
break;
case 'x':
+ if (VT == MVT::Other)
+ break;
if (VT == MVT::f32)
return RCPair(0U, &ARM::SPR_8RegClass);
if (VT.getSizeInBits() == 64)
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