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authorMichael Liao <michael.liao@intel.com>2012-10-23 21:40:15 +0000
committerMichael Liao <michael.liao@intel.com>2012-10-23 21:40:15 +0000
commit2843625bb520feca64c25976d2170b700216b562 (patch)
tree84672feec50206b030a8abc69cf036cf26d57cfc /llvm/lib
parentc7b09dd1d175131f54dff237dc5d783d9128ec48 (diff)
downloadbcm5719-llvm-2843625bb520feca64c25976d2170b700216b562.tar.gz
bcm5719-llvm-2843625bb520feca64c25976d2170b700216b562.zip
Fix PR14161
- Check index being extracted to be constant 0 before simplfiying. Otherwise, retain the original sequence. llvm-svn: 166504
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp5
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index a3973ed963f..f73b9d64b94 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -6630,9 +6630,12 @@ X86TargetLowering::lowerVectorIntExtend(SDValue Op, SelectionDAG &DAG) const {
.getOperand(0).getValueType().getSizeInBits() == SignificantBits) {
// (bitcast (sclr2vec (ext_vec_elt x))) -> (bitcast x)
SDValue V = V1.getOperand(0).getOperand(0).getOperand(0);
+ ConstantSDNode *CIdx =
+ dyn_cast<ConstantSDNode>(V1.getOperand(0).getOperand(0).getOperand(1));
// If it's foldable, i.e. normal load with single use, we will let code
// selection to fold it. Otherwise, we will short the conversion sequence.
- if (!ISD::isNormalLoad(V.getNode()) || !V.hasOneUse())
+ if (CIdx && CIdx->getZExtValue() == 0 &&
+ (!ISD::isNormalLoad(V.getNode()) || !V.hasOneUse()))
V1 = DAG.getNode(ISD::BITCAST, DL, V1.getValueType(), V);
}
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