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| author | Craig Topper <craig.topper@gmail.com> | 2016-12-14 06:06:58 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-12-14 06:06:58 +0000 |
| commit | 268b3abe6d1800c57aab01b5318f9ca574148884 (patch) | |
| tree | a69200ddc5f83a3f5cdfc0dc841aac47f6570107 /llvm/lib | |
| parent | dfd268d76bee38463593947b3ea017647b05d1e6 (diff) | |
| download | bcm5719-llvm-268b3abe6d1800c57aab01b5318f9ca574148884.tar.gz bcm5719-llvm-268b3abe6d1800c57aab01b5318f9ca574148884.zip | |
[X86][InstCombine] Teach SimplifyDemandedVectorElts to handle masked scalar add/sub/mul/div/max/min intrinsics better.
Now we can remove these intrinsics if element 0 isn't used. Also fix undef element tracking.
llvm-svn: 289636
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp | 22 | ||||
| -rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp | 12 |
2 files changed, 14 insertions, 20 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp index 6aa9c36ef6a..db5ac7fa570 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCalls.cpp @@ -1754,6 +1754,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { break; } + // X86 scalar intrinsics simplified with SimplifyDemandedVectorElts. case Intrinsic::x86_avx512_mask_add_ss_round: case Intrinsic::x86_avx512_mask_div_ss_round: case Intrinsic::x86_avx512_mask_mul_ss_round: @@ -1765,26 +1766,7 @@ Instruction *InstCombiner::visitCallInst(CallInst &CI) { case Intrinsic::x86_avx512_mask_mul_sd_round: case Intrinsic::x86_avx512_mask_sub_sd_round: case Intrinsic::x86_avx512_mask_max_sd_round: - case Intrinsic::x86_avx512_mask_min_sd_round: { - // These intrinsics only demand the lowest element of the second and third - // input vector. - bool MadeChange = false; - Value *Arg1 = II->getArgOperand(1); - Value *Arg2 = II->getArgOperand(2); - unsigned VWidth = Arg1->getType()->getVectorNumElements(); - if (Value *V = SimplifyDemandedVectorEltsLow(Arg1, VWidth, 1)) { - II->setArgOperand(1, V); - MadeChange = true; - } - if (Value *V = SimplifyDemandedVectorEltsLow(Arg2, VWidth, 1)) { - II->setArgOperand(2, V); - MadeChange = true; - } - if (MadeChange) - return II; - break; - } - + case Intrinsic::x86_avx512_mask_min_sd_round: case Intrinsic::x86_fma_vfmadd_ss: case Intrinsic::x86_fma_vfmsub_ss: case Intrinsic::x86_fma_vfnmadd_ss: diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp index 1e8432afe15..e9d83b38f54 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp @@ -1352,6 +1352,18 @@ Value *InstCombiner::SimplifyDemandedVectorElts(Value *V, APInt DemandedElts, // Three input scalar-as-vector operations that work column-wise. The high // elements come from operand 0 and the low element is a function of all // three inputs. + case Intrinsic::x86_avx512_mask_add_ss_round: + case Intrinsic::x86_avx512_mask_div_ss_round: + case Intrinsic::x86_avx512_mask_mul_ss_round: + case Intrinsic::x86_avx512_mask_sub_ss_round: + case Intrinsic::x86_avx512_mask_max_ss_round: + case Intrinsic::x86_avx512_mask_min_ss_round: + case Intrinsic::x86_avx512_mask_add_sd_round: + case Intrinsic::x86_avx512_mask_div_sd_round: + case Intrinsic::x86_avx512_mask_mul_sd_round: + case Intrinsic::x86_avx512_mask_sub_sd_round: + case Intrinsic::x86_avx512_mask_max_sd_round: + case Intrinsic::x86_avx512_mask_min_sd_round: case Intrinsic::x86_fma_vfmadd_ss: case Intrinsic::x86_fma_vfmsub_ss: case Intrinsic::x86_fma_vfnmadd_ss: |

