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| author | Evgenii Stepanov <eugenis@google.com> | 2019-11-15 13:29:54 -0800 |
|---|---|---|
| committer | Evgenii Stepanov <eugenis@google.com> | 2019-11-19 11:19:53 -0800 |
| commit | 2535fe5ad3327c8f77654a728986ca0afdf249f7 (patch) | |
| tree | b2a34783e6cdf13c0c23e85eb5f0c02681ff70d5 /llvm/lib | |
| parent | c97f303880c26007b4e74e3fd0bde5ed802a25f1 (diff) | |
| download | bcm5719-llvm-2535fe5ad3327c8f77654a728986ca0afdf249f7.tar.gz bcm5719-llvm-2535fe5ad3327c8f77654a728986ca0afdf249f7.zip | |
MTE: add more unchecked instructions.
Summary:
In particular, 1- and 2-byte loads and stores ignore the pointer tag
when using SP as the base register.
Reviewers: pcc, ostannard
Subscribers: hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70341
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp | 32 |
1 files changed, 29 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp b/llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp index 3cc556f74ae..73bd434ef12 100644 --- a/llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp +++ b/llvm/lib/Target/AArch64/AArch64StackTaggingPreRA.cpp @@ -97,23 +97,49 @@ FunctionPass *llvm::createAArch64StackTaggingPreRAPass() { static bool isUncheckedLoadOrStoreOpcode(unsigned Opcode) { switch (Opcode) { + case AArch64::LDRBBui: + case AArch64::LDRHHui: case AArch64::LDRWui: - case AArch64::LDRSHWui: case AArch64::LDRXui: + case AArch64::LDRBui: - case AArch64::LDRBBui: case AArch64::LDRHui: case AArch64::LDRSui: case AArch64::LDRDui: case AArch64::LDRQui: + + case AArch64::LDRSHWui: + case AArch64::LDRSHXui: + + case AArch64::LDRSBWui: + case AArch64::LDRSBXui: + + case AArch64::LDRSWui: + + case AArch64::STRBBui: + case AArch64::STRHHui: case AArch64::STRWui: case AArch64::STRXui: + case AArch64::STRBui: - case AArch64::STRBBui: case AArch64::STRHui: case AArch64::STRSui: case AArch64::STRDui: case AArch64::STRQui: + + case AArch64::LDPWi: + case AArch64::LDPXi: + case AArch64::LDPSi: + case AArch64::LDPDi: + case AArch64::LDPQi: + + case AArch64::LDPSWi: + + case AArch64::STPWi: + case AArch64::STPXi: + case AArch64::STPSi: + case AArch64::STPDi: + case AArch64::STPQi: return true; default: return false; |
