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| author | Chad Rosier <mcrosier@apple.com> | 2012-02-28 00:23:01 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@apple.com> | 2012-02-28 00:23:01 +0000 |
| commit | 248c29966c8ab5598e597fec16f121c4cb75bb1e (patch) | |
| tree | 53171538757f2913374605a2b1ae4ab179c636e0 /llvm/lib | |
| parent | c947412fae012e15832425d7276575ddb7ac0129 (diff) | |
| download | bcm5719-llvm-248c29966c8ab5598e597fec16f121c4cb75bb1e.tar.gz bcm5719-llvm-248c29966c8ab5598e597fec16f121c4cb75bb1e.zip | |
Fix 80-column violation.
llvm-svn: 151599
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/CodeGen/MachineLICM.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/MachineLICM.cpp b/llvm/lib/CodeGen/MachineLICM.cpp index fda60563ed4..8014fec38a2 100644 --- a/llvm/lib/CodeGen/MachineLICM.cpp +++ b/llvm/lib/CodeGen/MachineLICM.cpp @@ -1151,8 +1151,8 @@ bool MachineLICM::IsProfitableToHoist(MachineInstr &MI) { (!IsGuaranteedToExecute(MI.getParent()) && !MayCSE(&MI))) return false; - // High register pressure situation, only hoist if the instruction is going to - // be remat'ed. + // High register pressure situation, only hoist if the instruction is going + // to be remat'ed. if (!TII->isTriviallyReMaterializable(&MI, AA) && !MI.isInvariantLoad(AA)) return false; |
