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authorCraig Topper <craig.topper@intel.com>2018-01-27 20:19:09 +0000
committerCraig Topper <craig.topper@intel.com>2018-01-27 20:19:09 +0000
commit247016a735bd3264e07c6198dd3a7c419e6eeaee (patch)
treee6699e05b9802670c7aa93f9f201ed534ae4dc02 /llvm/lib
parent513d3fa674c621d864383ffa6418878118d48791 (diff)
downloadbcm5719-llvm-247016a735bd3264e07c6198dd3a7c419e6eeaee.tar.gz
bcm5719-llvm-247016a735bd3264e07c6198dd3a7c419e6eeaee.zip
[X86] Use vptestm/vptestnm for comparisons with zero to avoid creating a zero vector.
We can use the same input for both operands to get a free compare with zero. We already use this trick in a couple places where we explicitly create PTESTM with the same input twice. This generalizes it. I'm hoping to remove the ISD opcodes and move this to isel patterns like we do for scalar cmp/test. llvm-svn: 323605
Diffstat (limited to 'llvm/lib')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 912ae31aaf3..776632551d5 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -17777,6 +17777,13 @@ static SDValue LowerIntVSETCC_AVX512(SDValue Op, SelectionDAG &DAG) {
return DAG.getNode(SSECC == 0 ? X86ISD::TESTNM : X86ISD::TESTM,
dl, VT, RHS, LHS);
}
+
+ // If this is just a comparison with 0 without an AND, we can just use
+ // the same input twice to avoid creating a zero vector.
+ if (ISD::isBuildVectorAllZeros(Op1.getNode())) {
+ return DAG.getNode(SSECC == 0 ? X86ISD::TESTNM : X86ISD::TESTM,
+ dl, VT, Op0, Op0);
+ }
}
unsigned Opc = ISD::isUnsignedIntSetCC(SetCCOpcode) ? X86ISD::CMPMU
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