Use PassManagerBase instead of FunctionPassManager for functions

that merely add passes. This allows them to be used with either
FunctionPassManager or PassManager, or even with a custom new
kind of pass manager.

llvm-svn: 48256

22 files changed, 69 insertions, 72 deletions

diff --git a/llvm/lib/CodeGen/ELFWriter.cpp b/llvm/lib/CodeGen/ELFWriter.cpp
index 82bf9924d84..8b6fbb779af 100644
--- a/llvm/lib/CodeGen/ELFWriter.cpp
+++ b/llvm/lib/CodeGen/ELFWriter.cpp
@@ -50,11 +50,11 @@ using namespace llvm;
 char ELFWriter::ID = 0;
 /// AddELFWriter - Concrete function to add the ELF writer to the function pass
 /// manager.
-MachineCodeEmitter *llvm::AddELFWriter(FunctionPassManager &FPM,
+MachineCodeEmitter *llvm::AddELFWriter(PassManagerBase &PM,
                                        std::ostream &O,
                                        TargetMachine &TM) {
   ELFWriter *EW = new ELFWriter(O, TM);
-  FPM.add(EW);
+  PM.add(EW);
   return &EW->getMachineCodeEmitter();
 }
 
diff --git a/llvm/lib/CodeGen/LLVMTargetMachine.cpp b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
index 32fbc15e131..33cf6b54891 100644
--- a/llvm/lib/CodeGen/LLVMTargetMachine.cpp
+++ b/llvm/lib/CodeGen/LLVMTargetMachine.cpp
@@ -51,7 +51,7 @@ DisablePostRAScheduler("disable-post-RA-scheduler",
                        cl::init(true));
 
 FileModel::Model
-LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
+LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM,
                                        std::ostream &Out,
                                        CodeGenFileType FileType,
                                        bool Fast) {
@@ -158,7 +158,7 @@ LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
 /// addPassesToEmitFileFinish - If the passes to emit the specified file had to
 /// be split up (e.g., to add an object writer pass), this method can be used to
 /// finish up adding passes to emit the file, if necessary.
-bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
+bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM,
                                                   MachineCodeEmitter *MCE,
                                                   bool Fast) {
   if (MCE)
@@ -178,7 +178,7 @@ bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
 /// of functions.  This method should returns true if machine code emission is
 /// not supported.
 ///
-bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
+bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM,
                                                    MachineCodeEmitter &MCE,
                                                    bool Fast) {
   // Standard LLVM-Level Passes.
diff --git a/llvm/lib/CodeGen/MachOWriter.cpp b/llvm/lib/CodeGen/MachOWriter.cpp
index d163df3c4fe..f77f85e98d5 100644
--- a/llvm/lib/CodeGen/MachOWriter.cpp
+++ b/llvm/lib/CodeGen/MachOWriter.cpp
@@ -43,11 +43,11 @@ using namespace llvm;
 
 /// AddMachOWriter - Concrete function to add the Mach-O writer to the function
 /// pass manager.
-MachineCodeEmitter *llvm::AddMachOWriter(FunctionPassManager &FPM,
+MachineCodeEmitter *llvm::AddMachOWriter(PassManagerBase &PM,
                                          std::ostream &O,
                                          TargetMachine &TM) {
   MachOWriter *MOW = new MachOWriter(O, TM);
-  FPM.add(MOW);
+  PM.add(MOW);
   return &MOW->getMachineCodeEmitter();
 }
 
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
index 66d89533477..1b5137322e4 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp
@@ -116,12 +116,12 @@ const TargetAsmInfo *ARMTargetMachine::createTargetAsmInfo() const {
 
 
 // Pass Pipeline Configuration
-bool ARMTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool ARMTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createARMISelDag(*this));
   return false;
 }
 
-bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool ARMTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
   if (!Fast && !DisableLdStOpti && !Subtarget.isThumb())
     PM.add(createARMLoadStoreOptimizationPass());
@@ -133,7 +133,7 @@ bool ARMTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
   return true;
 }
 
-bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool ARMTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   // Output assembly language.
   PM.add(createARMCodePrinterPass(Out, *this));
@@ -141,7 +141,7 @@ bool ARMTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast,
 }
 
 
-bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool ARMTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
   setRelocationModel(Reloc::Static);
@@ -153,7 +153,7 @@ bool ARMTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   return false;
 }
 
-bool ARMTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool ARMTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   // Machine code emitter pass for ARM.
   PM.add(createARMCodeEmitterPass(*this, MCE));
diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h
index 84416d6b0e2..d4c41185721 100644
--- a/llvm/lib/Target/ARM/ARMTargetMachine.h
+++ b/llvm/lib/Target/ARM/ARMTargetMachine.h
@@ -55,13 +55,13 @@ public:
   virtual const TargetAsmInfo *createTargetAsmInfo() const;
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
-  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                     bool DumpAsm, MachineCodeEmitter &MCE);
 };
 
diff --git a/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp b/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
index 23ce3131d60..0887b952bb5 100644
--- a/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
+++ b/llvm/lib/Target/Alpha/AlphaTargetMachine.cpp
@@ -70,29 +70,29 @@ AlphaTargetMachine::AlphaTargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool AlphaTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool AlphaTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createAlphaISelDag(*this));
   return false;
 }
-bool AlphaTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool AlphaTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // Must run branch selection immediately preceding the asm printer
   PM.add(createAlphaBranchSelectionPass());
   return false;
 }
-bool AlphaTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool AlphaTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                             std::ostream &Out) {
   PM.add(createAlphaLLRPPass(*this));
   PM.add(createAlphaCodePrinterPass(Out, *this));
   return false;
 }
-bool AlphaTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool AlphaTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   PM.add(createAlphaCodeEmitterPass(*this, MCE));
   if (DumpAsm)
     PM.add(createAlphaCodePrinterPass(*cerr.stream(), *this));
   return false;
 }
-bool AlphaTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM,
+bool AlphaTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
                                               bool Fast, bool DumpAsm,
                                               MachineCodeEmitter &MCE) {
   return addCodeEmitter(PM, Fast, DumpAsm, MCE);
diff --git a/llvm/lib/Target/Alpha/AlphaTargetMachine.h b/llvm/lib/Target/Alpha/AlphaTargetMachine.h
index 5c74181880a..d365b7d29b0 100644
--- a/llvm/lib/Target/Alpha/AlphaTargetMachine.h
+++ b/llvm/lib/Target/Alpha/AlphaTargetMachine.h
@@ -58,13 +58,13 @@ public:
   static unsigned getModuleMatchQuality(const Module &M);
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
-  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                     bool DumpAsm, MachineCodeEmitter &MCE);
 };
 
diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp
index aca949a8399..3019b55e36c 100644
--- a/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp
+++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.cpp
@@ -71,14 +71,14 @@ SPUTargetMachine::SPUTargetMachine(const Module &M, const std::string &FS)
 //===----------------------------------------------------------------------===//
 
 bool
-SPUTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast)
+SPUTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast)
 {
   // Install an instruction selector.
   PM.add(createSPUISelDag(*this));
   return false;
 }
 
-bool SPUTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool SPUTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   PM.add(createSPUAsmPrinterPass(Out, *this));
   return false;
diff --git a/llvm/lib/Target/CellSPU/SPUTargetMachine.h b/llvm/lib/Target/CellSPU/SPUTargetMachine.h
index 6f1cabbd815..c8f70d76839 100644
--- a/llvm/lib/Target/CellSPU/SPUTargetMachine.h
+++ b/llvm/lib/Target/CellSPU/SPUTargetMachine.h
@@ -83,8 +83,8 @@ public:
   }
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
 };
 
diff --git a/llvm/lib/Target/IA64/IA64TargetMachine.cpp b/llvm/lib/Target/IA64/IA64TargetMachine.cpp
index eb84e6a02b4..d472b5cc5c7 100644
--- a/llvm/lib/Target/IA64/IA64TargetMachine.cpp
+++ b/llvm/lib/Target/IA64/IA64TargetMachine.cpp
@@ -73,17 +73,17 @@ IA64TargetMachine::IA64TargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool IA64TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool IA64TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createIA64DAGToDAGInstructionSelector(*this));
   return false;
 }
 
-bool IA64TargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool IA64TargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   // Make sure everything is bundled happily
   PM.add(createIA64BundlingPass(*this));
   return true;
 }
-bool IA64TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool IA64TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                            std::ostream &Out) {
   PM.add(createIA64CodePrinterPass(Out, *this));
   return false;
diff --git a/llvm/lib/Target/IA64/IA64TargetMachine.h b/llvm/lib/Target/IA64/IA64TargetMachine.h
index 5b320c2e96c..9e553a1338e 100644
--- a/llvm/lib/Target/IA64/IA64TargetMachine.h
+++ b/llvm/lib/Target/IA64/IA64TargetMachine.h
@@ -48,9 +48,9 @@ public:
   static unsigned getModuleMatchQuality(const Module &M);
 
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
 };
 } // End llvm namespace
diff --git a/llvm/lib/Target/Mips/Mips.h b/llvm/lib/Target/Mips/Mips.h
index 64c51f70b82..0387c6af6f8 100644
--- a/llvm/lib/Target/Mips/Mips.h
+++ b/llvm/lib/Target/Mips/Mips.h
@@ -19,7 +19,6 @@
 
 namespace llvm {
   class MipsTargetMachine;
-  class FunctionPassManager;
   class FunctionPass;
   class MachineCodeEmitter;
 
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
index 7493bb527eb..09e058f34f3 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp
@@ -65,7 +65,7 @@ getModuleMatchQuality(const Module &M)
 // Install an instruction selector pass using 
 // the ISelDag to gen Mips code.
 bool MipsTargetMachine::
-addInstSelector(FunctionPassManager &PM, bool Fast) 
+addInstSelector(PassManagerBase &PM, bool Fast) 
 {
   PM.add(createMipsISelDag(*this));
   return false;
@@ -75,7 +75,7 @@ addInstSelector(FunctionPassManager &PM, bool Fast)
 // machine code is emitted. return true if -print-machineinstrs should 
 // print out the code after the passes.
 bool MipsTargetMachine::
-addPreEmitPass(FunctionPassManager &PM, bool Fast) 
+addPreEmitPass(PassManagerBase &PM, bool Fast) 
 {
   PM.add(createMipsDelaySlotFillerPass(*this));
   return true;
@@ -84,7 +84,7 @@ addPreEmitPass(FunctionPassManager &PM, bool Fast)
 // Implements the AssemblyEmitter for the target. Must return
 // true if AssemblyEmitter is supported
 bool MipsTargetMachine::
-addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                    std::ostream &Out) 
 {
   // Output assembly language.
diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h
index d974d3c0cf6..2b877f2beef 100644
--- a/llvm/lib/Target/Mips/MipsTargetMachine.h
+++ b/llvm/lib/Target/Mips/MipsTargetMachine.h
@@ -55,9 +55,9 @@ namespace llvm {
     static unsigned getModuleMatchQuality(const Module &M);
 
     // Pass Pipeline Configuration
-    virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-    virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-    virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+    virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+    virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+    virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                     std::ostream &Out);
   };
 } // End llvm namespace
diff --git a/llvm/lib/Target/PowerPC/PPC.h b/llvm/lib/Target/PowerPC/PPC.h
index 39407f7292e..b9f64839cef 100644
--- a/llvm/lib/Target/PowerPC/PPC.h
+++ b/llvm/lib/Target/PowerPC/PPC.h
@@ -23,7 +23,6 @@
 
 namespace llvm {
   class PPCTargetMachine;
-  class FunctionPassManager;
   class FunctionPass;
   class MachineCodeEmitter;
   
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
index f770eeb54ec..a77cc15d8f8 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
@@ -118,26 +118,26 @@ PPC64TargetMachine::PPC64TargetMachine(const Module &M, const std::string &FS)
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool PPCTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createPPCISelDag(*this));
   return false;
 }
 
-bool PPCTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool PPCTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   
   // Must run branch selection immediately preceding the asm printer.
   PM.add(createPPCBranchSelectionPass());
   return false;
 }
 
-bool PPCTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool PPCTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   PM.add(createPPCAsmPrinterPass(Out, *this));
   return false;
 }
 
-bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool PPCTargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // The JIT should use the static relocation model in ppc32 mode, PIC in ppc64.
   // FIXME: This should be moved to TargetJITInfo!!
@@ -161,7 +161,7 @@ bool PPCTargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   return false;
 }
 
-bool PPCTargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool PPCTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                             bool DumpAsm, MachineCodeEmitter &MCE) {
   // Machine code emitter pass for PowerPC.
   PM.add(createPPCCodeEmitterPass(*this, MCE));
diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
index 1d76d15f5a0..ed8780968fe 100644
--- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h
+++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h
@@ -65,13 +65,13 @@ public:
   }
   
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
-  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                     bool DumpAsm, MachineCodeEmitter &MCE);
   virtual bool getEnableTailMergeDefault() const;
 };
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
index bef34e6e21f..38f6d6a9014 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp
@@ -61,7 +61,7 @@ unsigned SparcTargetMachine::getModuleMatchQuality(const Module &M) {
 #endif
 }
 
-bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool SparcTargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   PM.add(createSparcISelDag(*this));
   return false;
 }
@@ -69,13 +69,13 @@ bool SparcTargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
 /// addPreEmitPass - This pass may be implemented by targets that want to run
 /// passes immediately before machine code is emitted.  This should return
 /// true if -print-machineinstrs should print out the code after the passes.
-bool SparcTargetMachine::addPreEmitPass(FunctionPassManager &PM, bool Fast) {
+bool SparcTargetMachine::addPreEmitPass(PassManagerBase &PM, bool Fast) {
   PM.add(createSparcFPMoverPass(*this));
   PM.add(createSparcDelaySlotFillerPass(*this));
   return true;
 }
 
-bool SparcTargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool SparcTargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                             std::ostream &Out) {
   // Output assembly language.
   PM.add(createSparcCodePrinterPass(Out, *this));
diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h
index 0da92935c28..6ccb0d6c3b3 100644
--- a/llvm/lib/Target/Sparc/SparcTargetMachine.h
+++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h
@@ -46,9 +46,9 @@ public:
   static unsigned getModuleMatchQuality(const Module &M);
 
   // Pass Pipeline Configuration
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);
-  virtual bool addPreEmitPass(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);
+  virtual bool addPreEmitPass(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
 };
 
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index c2a1dfde615..81177bad08d 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -20,7 +20,6 @@
 namespace llvm {
 
 class X86TargetMachine;
-class FunctionPassManager;
 class FunctionPass;
 class MachineCodeEmitter;
 
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index 850eb386fb5..2d0424bf44c 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -153,24 +153,24 @@ X86TargetMachine::X86TargetMachine(const Module &M, const std::string &FS,
 // Pass Pipeline Configuration
 //===----------------------------------------------------------------------===//
 
-bool X86TargetMachine::addInstSelector(FunctionPassManager &PM, bool Fast) {
+bool X86TargetMachine::addInstSelector(PassManagerBase &PM, bool Fast) {
   // Install an instruction selector.
   PM.add(createX86ISelDag(*this, Fast));
   return false;
 }
 
-bool X86TargetMachine::addPostRegAlloc(FunctionPassManager &PM, bool Fast) {
+bool X86TargetMachine::addPostRegAlloc(PassManagerBase &PM, bool Fast) {
   PM.add(createX86FloatingPointStackifierPass());
   return true;  // -print-machineinstr should print after this.
 }
 
-bool X86TargetMachine::addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+bool X86TargetMachine::addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                           std::ostream &Out) {
   PM.add(createX86CodePrinterPass(Out, *this));
   return false;
 }
 
-bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool X86TargetMachine::addCodeEmitter(PassManagerBase &PM, bool Fast,
                                       bool DumpAsm, MachineCodeEmitter &MCE) {
   // FIXME: Move this to TargetJITInfo!
   if (DefRelocModel == Reloc::Default) {
@@ -189,7 +189,7 @@ bool X86TargetMachine::addCodeEmitter(FunctionPassManager &PM, bool Fast,
   return false;
 }
 
-bool X86TargetMachine::addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+bool X86TargetMachine::addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                         bool DumpAsm, MachineCodeEmitter &MCE) {
   PM.add(createX86CodeEmitterPass(*this, MCE));
   if (DumpAsm)
diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h
index e9148b5a52e..7a807b148c4 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.h
+++ b/llvm/lib/Target/X86/X86TargetMachine.h
@@ -61,13 +61,13 @@ public:
   static unsigned getJITMatchQuality();
   
   // Set up the pass pipeline.
-  virtual bool addInstSelector(FunctionPassManager &PM, bool Fast);  
-  virtual bool addPostRegAlloc(FunctionPassManager &PM, bool Fast);
-  virtual bool addAssemblyEmitter(FunctionPassManager &PM, bool Fast, 
+  virtual bool addInstSelector(PassManagerBase &PM, bool Fast);  
+  virtual bool addPostRegAlloc(PassManagerBase &PM, bool Fast);
+  virtual bool addAssemblyEmitter(PassManagerBase &PM, bool Fast, 
                                   std::ostream &Out);
-  virtual bool addCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addCodeEmitter(PassManagerBase &PM, bool Fast,
                               bool DumpAsm, MachineCodeEmitter &MCE);
-  virtual bool addSimpleCodeEmitter(FunctionPassManager &PM, bool Fast,
+  virtual bool addSimpleCodeEmitter(PassManagerBase &PM, bool Fast,
                                     bool DumpAsm, MachineCodeEmitter &MCE);
 };